Patents by Inventor Sébastien Cliquennois

Sébastien Cliquennois has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11525851
    Abstract: A digital integrated circuit includes first areas of a substrate which incorporate digital functions and second areas of the substrate which are filler between first areas. A capacitance is provided by interdigitated metal-insulator-metal structures formed from a metallization level above the substrate. The structures of the capacitance are vertically aligned with one or more of the second areas.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: December 13, 2022
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventor: Sebastien Cliquennois
  • Publication number: 20200393503
    Abstract: A digital integrated circuit includes first areas of a substrate which incorporate digital functions and second areas of the substrate which are filler between first areas. A capacitance is provided by interdigitated metal-insulator-metal structures formed from a metallization level above the substrate. The structures of the capacitance are vertically aligned with one or more of the second areas.
    Type: Application
    Filed: June 10, 2020
    Publication date: December 17, 2020
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Sebastien CLIQUENNOIS
  • Patent number: 8537047
    Abstract: The invention relates to the digital signal requantization, at a given quantization step size, of a first word received in a first period of time and encoded in a first number of bits, into a second word, with a quantization error equal to a third number. A sequence of third words is outputted, equal to the second word, with the sequence subdivided into a first group comprising a number of third words that is equal to the third number and a second group of third words. Before outputting them, the correction means adds a least significant bit to the third words of the first group and adds or subtracts least significant bits to or from the third words of the second group, such that the sum of the least significant bits added to and subtracted from the second group is zero.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: September 17, 2013
    Assignee: ST-Ericsson SA
    Inventor: Sébastien Cliquennois
  • Publication number: 20120133531
    Abstract: The invention relates to the digital signal requantization, at a given quantization step size, of a first word received in a first period of time and encoded in a first number of bits, into a second word, with a quantization error equal to a third number. A sequence of third words is outputted, equal to the second word, with the sequence subdivided into a first group comprising a number of third words that is equal to the third number and a second group of third words. Before outputting them, the correction means adds a least significant bit to the third words of the first group and adds or subtracts least significant bits to or from the third words of the second group, such that the sum of the least significant bits added to and subtracted from the second group is zero.
    Type: Application
    Filed: July 26, 2010
    Publication date: May 31, 2012
    Inventor: Sébastien Cliquennois