Abstract: A three-dimensional capacitor component that includes a substrate having a textured (contoured) surface and a stack of layers formed conformally over the textured surface to constitute a capacitive stack structure. Respective contacts to the bottom and top electrodes of the capacitive stack structure are both provided at a first side of the component. The bottom electrode and substrate are doped with dopants of the same polarity, and the substrate is heavily doped so that current between a terminal portion of the bottom electrode and remote parts of the bottom electrode flows via the substrate, lowering ESR. A backside metallization layer produces a further, and greater, reduction in ESR. The capacitor component may be implemented as a discrete capacitor component, but may also be integrated with other components/devices. Corresponding fabrication methods are described.