Abstract: The disclosure relates to the field of memories in integrated circuit form. It can be applied more particularly to the field of EPROM or EEPROM type electrically programmable non-volatile memories. A memory array and read circuits are proposed in order to improve the time taken to read a data element. During a reading operation a read circuit is connected firstly to an erased cell and secondly to a programmed cell. The memory outputs a 1 for a read operation that access a first memory cell having an erased state and a second memory cell having a programmed cell, and further, the memory outputs a 0 for a read operation that access a first memory cell having a programmed state and a second memory cell having an erased state.

Abstract: A device for protection of data stored in a memory includes a supply voltage drop detection device to set an enabling signal in an active state when a supply voltage is below a threshold and a flip-flop circuit whose output controls the state of the enabling signal concurrently with the supply voltage drop detection device so that all programming is prohibited when the flip-flop circuit stores a first state, and the protection device is organized in such a way that this state of the flip-flop circuit is modified only after the supply voltage drop detection circuit has detected that the supply voltage is below the threshold.