Patents by Inventor S. J. Cheng

S. J. Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7005054
    Abstract: A method to make probes of a probe card includes providing a blocking plate on an electroplating tank. The blocking plate has a plurality of openings according to the layout of contact pads on a probe head. There are bumps on the contact pads of the probe head. Continuous electroplating process can be executed after bumps (contact pads) contact electroplating solution in the electroplating tank through the openings of the blocking plate. By continuously moving the probe head according to the desired shape of probes, probes were formed by electroplating. These probes can be made into different shapes with good uniformity in elasticity and heights to increase the quality of electrical contact during wafer probing. Moreover, the process lead time and fabrication cost are saved.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: February 28, 2006
    Assignees: Chipmos Technologies (Bermuda) Ltd., Chipmos Technologies Inc.
    Inventors: S. J. Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Y. J. Lee
  • Publication number: 20040207420
    Abstract: A modularized probe card with coaxial transmitter is disclosed. At least a coaxial transmitter is modularized and installed between a first printed circuit board and a second printed circuit board. The coaxial transmitter has a first connector and a second connector correspondingly connecting two ends of each coaxial cable of the coaxial transmitter for electrically connecting corresponding in location to first printed circuit board and second printed circuit board. A probe head is bonded on second printed circuit board. The second connector of the coaxial transmitter is connected with the second printed circuit board in a plug-in and pull-away type.
    Type: Application
    Filed: April 17, 2003
    Publication date: October 21, 2004
    Inventors: S. J. Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Y. J. Lee
  • Publication number: 20040035706
    Abstract: A method to make probes of a probe card includes providing a blocking plate on an electroplating tank. The blocking plate has a plurality of openings according to the layout of contact pads on a probe head. There are bumps on the contact pads of probe head. Continuous electroplating process can be executed after bumps (contact pads) contact electroplating solution in the electroplating tank through the openings of the blocking plate. By continuously moving the probe head according to the desired shape of probes, probes were formed by electroplating. These probes can be made into different shapes with good uniformity in elasticity and heights to increase the quality of electrical contact during wafer probing. Moreover, the process lead time and fabrication cost are saved.
    Type: Application
    Filed: August 20, 2002
    Publication date: February 26, 2004
    Applicant: ChipMOS Technologies (Bermuda) Ltd. and ChipMOS TECHNOLOGIES INC.
    Inventors: S. J. Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Y. J. Lee
  • Patent number: 6686615
    Abstract: A flip chip type semiconductor device for reducing signal skew includes: a chip with bonding pads, and a plurality of bumping pads on the chip. Between each bonding pad and corresponding bumping pads is connected with a metal redistribution trace covered by a passivation layer. Each metal trace has an equal trace length for reducing signal skew.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: February 3, 2004
    Assignees: Chipmos Technologies (Bermuda) Ltd., Chipmos Technologies Inc.
    Inventors: S. J. Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Y. J. Lee
  • Publication number: 20040012405
    Abstract: A probe card with full wafer contact configuration comprises a back plate and a plurality of modular multiplayer ceramic wiring boards coplanarly mounted on the back plate. The total size of the modular multilayer ceramic wiring boards is larger than that of a wafer under test in order to fully contact all the bonding pads of the wafer under test. The modular multilayer ceramic wiring boards can be manufactured separately according to various locations. Thus, the manufacturing cost is reduced and yield is improved and lead time is shortened.
    Type: Application
    Filed: July 19, 2002
    Publication date: January 22, 2004
    Applicants: ChipMOS Technologies (Bermuda) Ltd., ChipMOS TECHNOLOGIES INC.
    Inventors: S. J. Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Y. J. Lee