Abstract: High-voltage CMOS devices and low-voltage CMOS devices are integrated on a common substrate by forming a sacrificial film over at least active device areas, lithographically defining device active regions of the high-voltage CMOS devices, implanting dopants selectively through the sacrificial film into the lithographically defined device active regions of the high-voltage CMOS devices, diffusing the implanted dopants, removing the sacrificial film, and subsequently forming low-voltage CMOS devices.

Abstract: A method of forming a semiconductor device, the method including forming a substrate including a first surface having a non-doped region, forming an insulative material over the first surface of the substrate, forming a first conductive material over the first insulative material, forming an opening in the first conductive material that forms a path to the substrate that is substantially free of the first conductive material and the first insulative material, forming a second insulative material over the first conductive material, and forming a second conductive material over the second insulative material, wherein the second conductive material is formed in the opening and contacts the non-doped region of the substrate.

Abstract: A fluid ejection device including: a substrate having a first surface having an non-doped region; a first insulative material disposed on a portion of the first surface, the first insulative material having a plurality of openings forming a path to the first surface; a first conductive material disposed on the first insulative material, the first conductive material being disposed so that the plurality of openings are substantially free of the first conductive material; a second insulative material disposed on the first conductive material and portions of the first insulative material, the second insulative material being disposed so that the plurality of openings are substantial free of the second insulative material and a second conductive material being disposed on second insulative material and within plurality of openings so that some of the second conductive material disposed upon the second insulative material is in electrical contact with the non-doped region on the substrate.

Abstract: An integrated circuit (IC) is formed on a substrate. The IC has a first well having a first dopant concentration that includes a second conductivity low-voltage transistor. The IC also has a second well having a dopant concentration equal to the first dopant concentration that includes a first conductivity high-voltage transistor. In addition, the IC has a third well having a second dopant concentration of an opposite type than the first well that includes a first conductivity low-voltage transistor. The first conductivity low-voltage transistor and the second conductivity low-voltage transistor are created without a threshold voltage (Vt) implant.

Abstract: An integrated circuit includes an array of state-change devices, first and second decoder circuits for selecting a particular state-change device. A voltage source is coupled to the first decoder circuit and sense circuitry is coupled to the second decoder to receive an electrical parameter from the selected state-change device and to detect a particular value of the electrical parameter. A control circuit is coupled to the voltage source, the first and second decoders, and the sense circuitry to select a first voltage from the voltage source to alter the selected state-change device and to select a second voltage from the voltage source when the sense circuitry detects the particular value of the electrical parameter.

Abstract: An integrated circuit (IC) is formed on a substrate. The IC has a first well having a first dopant concentration that includes a second conductivity low-voltage transistor. The IC also has a second well having a dopant concentration equal to the first dopant concentration that includes a first conductivity high-voltage transistor. In addition, the IC has a third well having a second dopant concentration of an opposite type than the first well that includes a first conductivity low-voltage transistor. The first conductivity low-voltage transistor and the second conductivity low-voltage transistor are created without a threshold voltage (Vt) implant.

Abstract: An integrated circuit (IC) is formed on a substrate. The IC has a first well having a first dopant concentration that includes a second conductivity low-voltage transistor. The IC also has a second well having a dopant concentration equal to the first dopant concentration that includes a first conductivity high-voltage transistor. In addition, the IC has a third well having a second dopant concentration of an opposite type than the first well that includes a first conductivity low-voltage transistor. The first conductivity low-voltage transistor and the second conductivity low-voltage transistor are created without a threshold voltage (Vt) implant.

Abstract: An integrated circuit includes an array of state-change devices, first and second decoder circuits for selecting a particular state-change device. A voltage source is coupled to the first decoder circuit and sense circuitry is coupled to the second decoder to receive an electrical parameter from the selected state-change device and to detect a particular value of the electrical parameter. A control circuit is coupled to the voltage source, the first and second decoders, and the sense circuitry to select a first voltage from the voltage source to alter the selected state-change device and to select a second voltage from the voltage source when the sense circuitry detects the particular value of the electrical parameter.

Abstract: A memory structure has an antifuse material that is unpatterned and sandwiched between each of a plurality of antifuse electrode pairs. The antifuse material is continuous between the antifuse electrode pairs. Furthermore the present invention includes a memory structure comprising a plurality of antifuse electrode pairs forming a plurality of row conductors and a plurality of middle conductors in electrical communication with a plurality of control elements.