Patents by Inventor S. M. Sadjadi

S. M. Sadjadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060166145
    Abstract: A method for etching a feature in a layer is provided. An underlayer of a polymer material is formed over the layer. A top image layer is formed over the underlayer. The top image layer is exposed to patterned radiation. A pattern is developed in the top image layer. The pattern is transferred from the top image layer to the underlayer with a reducing dry etch. The layer is etched through the underlayer, where the top image layer is completely removed and the underlayer is used as a pattern mask during the etching the layer to transfer the pattern from the underlayer to the layer.
    Type: Application
    Filed: March 24, 2006
    Publication date: July 27, 2006
    Inventors: Hanzhong Xiao, Helen Zhu, Kuo-Lung Tang, S.M. Sadjadi
  • Publication number: 20060134917
    Abstract: A method for forming features in an etch layer in an etch stack with an etch mask over the etch layer, wherein the etch mask has etch mask features with sidewalls, where the etch mask features have a first critical dimension, is provided. A cyclical critical dimension reduction is performed to form deposition layer features with a second critical dimension, which is less than the first critical dimension. Each cycle, comprises a depositing phase for depositing a deposition layer over the exposed surfaces, including the vertical sidewalls, of the etch mask features and an etching phase for etching back the deposition layer leaving a selective deposition on the vertical sidewalls. Features are etched into the etch layer, wherein the etch layer features have a third critical dimension, which is less than the first critical dimension.
    Type: Application
    Filed: December 16, 2004
    Publication date: June 22, 2006
    Inventors: Zhisong Huang, S.M. Sadjadi, Jeffrey Marks
  • Publication number: 20060011578
    Abstract: A method for etching a dielectric layer below a photoresist mask is provided. A wafer with the dielectric layer disposed below a photoresist mask is provided in an etch chamber. An etch gas comprising CF4 and H2 is provided into the etch chamber wherein the CF4 has a flow rate and the H2 has a flow rate, wherein the flow rate of H2 is greater than the flow rate of CF4. A plasma is formed from the etch gas. Features are etched into the dielectric layer through the etch mask using the plasma formed from the etch gas.
    Type: Application
    Filed: July 16, 2004
    Publication date: January 19, 2006
    Inventors: Sean Kang, Zhisong Huang, S. M. Sadjadi
  • Publication number: 20050039682
    Abstract: A workpiece is processed with a plasma in a vacuum plasma processing chamber by exciting the plasma at several frequencies such that the excitation of the plasma by the several frequencies simultaneously causes several different phenomena to occur in the plasma. The chamber includes central top and bottom electrodes and a peripheral top and/or bottom electrode arrangement that is either powered by RF or is connected to a reference potential by a filter arrangement that passes at least one of the plasma excitation frequencies to the exclusion of other frequencies.
    Type: Application
    Filed: August 22, 2003
    Publication date: February 24, 2005
    Inventors: Raj Dhindsa, S.M. Sadjadi, Felix Kozakevich, Dave Trussell, Lumin Li, Eric Lenz, Camelia Rusu, Mukund Srinivasan, Aaron Eppler, Jim Tietz, Jeffrey Marks
  • Publication number: 20050009324
    Abstract: The present inventions is a method of trench formation within a dielectric layer, comprising, first, etching a via within the dielectric layer. After the via is etched, an organic plug is used to fill a portion of the via. After the desired amount of organic plug has been etched from the via, a trench is etched with a first gas mixture to a first depth, and a second gas mixture is used to further etch the trench to the final desired trench depth. Preferably, the method is used for low-k dielectrics that do not have an intermediate etch stop layer. Additionally, it is preferable that the first gas mixture is a polymeric gas mixture and the second gas mixture is a non-polymeric gas mixture. As a result of using this method, an interconnect structure for a low-k dielectric without an intermediate etch stop layer having a trench with trench edges that are substantially orthogonal and a via with via edges that are substantially orthogonal is generated.
    Type: Application
    Filed: April 16, 2004
    Publication date: January 13, 2005
    Applicant: Lam Research Corporation
    Inventors: SiYi Li, S.M. Sadjadi, David Pirkle, Stephan Lassig, Sean Kang, Vinay Pohray, Peter Cirigliano