Patents by Inventor S. Mohammad

S. Mohammad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8737117
    Abstract: A system and method to manage leakage of a complementary metal-oxide-semiconductor (CMOS) read transistor in a memory cell. In a particular embodiment, a memory cell is disclosed that includes a storage element and a complementary metal-oxide-semiconductor (CMOS) read transistor. The CMOS read transistor includes a first terminal coupled to a read word line, a second terminal coupled to a read bit line, and a third terminal coupled to the storage element. During a non-read operating time, the read word line and the read bit line are both maintained at substantially the same voltage level. During a read operation, the read word line is maintained at a particular voltage level until after a voltage representing data stored at the storage element is sensed by the CMOS read transistor.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: May 27, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Baker S. Mohammad
  • Publication number: 20130257466
    Abstract: In a particular embodiment, a method includes receiving a testing activation signal at a controller coupled to a semiconductor device. The method further includes biasing a well of at least one transistor of the semiconductor device in response to the received testing activation signal. The bias is provided by a biasing circuit that is responsive to the controller. While the well is biased, a test of the semiconductor device is performed to generate testing data.
    Type: Application
    Filed: May 23, 2013
    Publication date: October 3, 2013
    Inventors: Baker S. Mohammad, Hong S. Kim, Paul D. Bassett
  • Patent number: 8466707
    Abstract: In a particular embodiment, a method includes receiving a testing activation signal at a controller coupled to a semiconductor device. The method further includes biasing a well of at least one transistor of the semiconductor device in response to the received testing activation signal. The bias is provided by a biasing circuit that is responsive to the controller. While the well is biased, a test of the semiconductor device is performed to generate testing data.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: June 18, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Baker S. Mohammad, Hong S. Kim, Paul Douglas Bassett
  • Publication number: 20130076424
    Abstract: A device includes a plurality of driver circuits coupled to a plurality of bus lines. A first driver circuit of the plurality of driver circuits is coupled to a first bus line of the plurality of bus lines. The first driver circuit includes one of a skewed inverter, a level shifter, a latch, and a sense amplifier configured to produce an output signal that transitions after a first delay in response to a first digital value transition of an input signal from high to low and transitions after a second delay in response to a second digital value transition of the input signal from low to high. The first delay is different from the second delay by an amount sufficient to reduce power related to transmission of signals over the first bus line and over a second bus line in close physical proximity to the first bus line.
    Type: Application
    Filed: September 23, 2011
    Publication date: March 28, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Baker S. Mohammad, Paul D. Bassett, Martin Saint-Laurent
  • Patent number: 8397238
    Abstract: Methods, apparatuses, and computer-readable storage media are disclosed for reducing power by reducing hardware-thread toggling in a multi-threaded processor. In a particular embodiment, a method allocates software threads to hardware threads. A number of software threads to be allocated is identified. It is determined when the number of software threads is less than a number of hardware threads. When the number of software threads is less than the number of hardware threads, at least two of the software threads are allocated to non-sequential hardware threads. A clock signal to be applied to the hardware threads is adjusted responsive to the non-sequential hardware threads allocated.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: March 12, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Suresh K. Venkumahanti, Martin Saint-Laurent, Lucian Codrescu, Baker S. Mohammad
  • Publication number: 20110273943
    Abstract: A system and method to manage leakage of a complementary metal-oxide-semiconductor (CMOS) read transistor in a memory cell. In a particular embodiment, a memory cell is disclosed that includes a storage element and a complementary metal-oxide-semiconductor (CMOS) read transistor. The CMOS read transistor includes a first terminal coupled to a read word line, a second terminal coupled to a read bit line, and a third terminal coupled to the storage element. During a non-read operating time, the read word line and the read bit line are both maintained at substantially the same voltage level. During a read operation, the read word line is maintained at a particular voltage level until after a voltage representing data stored at the storage element is sensed by the CMOS read transistor.
    Type: Application
    Filed: May 5, 2010
    Publication date: November 10, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventor: Baker S. Mohammad
  • Publication number: 20110215827
    Abstract: In a particular embodiment, a method includes receiving a testing activation signal at a controller coupled to a semiconductor device. The method further includes biasing a well of at least one transistor of the semiconductor device in response to the received testing activation signal. The bias is provided by a biasing circuit that is responsive to the controller. While the well is biased, a test of the semiconductor device is performed to generate testing data.
    Type: Application
    Filed: March 3, 2010
    Publication date: September 8, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventors: Baker S. Mohammad, Hong S. Kim, Paul D. Bassett
  • Publication number: 20110138393
    Abstract: Methods, apparatuses, and computer-readable storage media are disclosed for reducing power by reducing hardware-thread toggling in a multi-threaded processor. In a particular embodiment, a method allocates software threads to hardware threads. A number of software threads to be allocated is identified. It is determined when the number of software threads is less than a number of hardware threads. When the number of software threads is less than the number of hardware threads, at least two of the software threads are allocated to non-sequential hardware threads. A clock signal to be applied to the hardware threads is adjusted responsive to the non-sequential hardware threads allocated.
    Type: Application
    Filed: December 8, 2009
    Publication date: June 9, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventors: Suresh K. Venkumahanti, Martin Saint-Laurent, Lucian Codrescu, Baker S. Mohammad
  • Publication number: 20070037132
    Abstract: A device for separating platelets from a fluid suspension comprises a mixing chamber operable to receive and mix fluid suspensions and an aggregating agent to form platelet aggregates and residual fluid components. A filter can be configured to be in fluid communication with the mixing chamber and can be further configured to collect platelet aggregates and allow residual fluid components to pass therethrough. The mixing chamber and the filter are operable by a user without input from an external energy source.
    Type: Application
    Filed: August 25, 2006
    Publication date: February 15, 2007
    Inventors: Sivaprasad Sukavaneshvar, S. Mohammad
  • Publication number: 20060127875
    Abstract: A method is described for separating, retrieving and concentrating platelets from whole blood relying on aggregation of the platelets followed by filtration. This method eliminates the need of a centrifuge for separating said cells from blood. To obtain cellular concentrates of platelets, blood is mixed with compatible agents that will aggregate cells while retaining contained growth factors. The resulting aggregates can then be separated from blood by filtration. If desired, the filter-captured aggregates are subject to a brief washing cycle where they are washed clean of residual aggregating agent, plasma, and red cells. Aggregates can then be partly or wholly deaggregated and the cells retrieved. The result is a suspension of cells and small aggregates with therapeutic levels of concentrated blood cells with included growth factors that are available for delivery to a wound site. A device that accomplishes the aforementioned process is also described.
    Type: Application
    Filed: January 25, 2006
    Publication date: June 15, 2006
    Inventors: Sivaprasad Sukavaneshvar, S. Mohammad