Abstract: This invention relates to the Thin Film Transistor having the self-aligned diffused source/drain regions for improving the ratio of on to off current and the method of fabricating the same.

Abstract: A hole capacitor is formed which has a first electrode with a plurality of holes and projections. Another electrode is matched with the first electrode and separated from the first electrode by a dielectric layer. A method for making the hole capacitor includes the steps of: depositing a nitride layer and a lower oxide layer, and forming a buried contact hole, after forming an MOS transistor upon a semiconductor substrate. Thereafter depositing an in-situ doped non-single crystalline silicon layer, an undoped non-single crystalline silicon layer, and a hemispherical polysilicon layer in all in sequence with a thickness of 1500 .ANG. or over. An upper oxide film is deposited, and then, carrying out an etch-back on the upper oxide film so that the hemispherical polysilicon domes are exposed.

Abstract: A method for making semiconductor thin film transistors (TFTs) having a bottom gate such that the gate electrode is formed of a polysilicon layer with a rugged surface, thereby providing a TFT which has a high on/off current ratio. According to the present invention, a thin film transistor may have a substrate; a gate electrode having a rugged surface formed on the substrate; a gate insulating layer formed on the gate electrode and the substrate; a semiconductor layer formed over the gate insulation layer; impurity regions formed at opposite sides of the gate electrode in the semiconductor layer. A method for making a thin film transistor according to present invention may include the steps of: forming a gate electrode having a rugged surface on a substrate; forming an insulating layer and a semiconductor layer on the substrate and the gate electrode; forming impurity regions at opposite sides of the gate electrode in the semiconductor layer.

Abstract: This invention relates to the Thin Film Transistor having the self-aligned diffused source/drain regions for improving the ratio of on to off current and the method of fabricating the same.

Abstract: A method for making a hole capacitor for DRAM cell includes the steps of: depositing a nitride layer and a lower oxide layer, and forming a buried contact hole, after forming a MOS transistor upon a semiconductor substrate. Thereafter depositing an in-situ doped non-crystalline silicon layer, an undoped non-crystalline silicon layer, and a hemispherical polysilicon layer in all in sequence with a thickness of 1500 .ANG. or over. An upper oxide film is deposited, and then, carrying out an etch-back on the upper oxide film so that the hemispherical polysilicon domes are exposed. Etching the polysilicon layers using the remained portions of the upper oxide film remaining on the valleys of the hemispherical polysilicon as a mask, in order to form a plurality of holes perforated from the domes to the insulating layer located under the layers. The upper oxide film is removed through an etch process.