Patents by Inventor Saad Sarwana

Saad Sarwana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8050648
    Abstract: Digital mixers which permit mixing of asynchronous signals may be constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: November 1, 2011
    Assignee: Hypres, Inc.
    Inventors: Alexander F. Kirichenko, Deepnarayan Gupta, Saad Sarwana
  • Patent number: 7680474
    Abstract: Digital mixers which permit mixing of asynchronous signals are constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: March 16, 2010
    Assignee: Hypres Inc.
    Inventors: Alexander F. Kirichenko, Deepnarayan Gupta, Saad Sarwana
  • Patent number: 7376691
    Abstract: The present invention discloses an ALU (Arithmetic Logic Unit) that can be operated as an OR gate, an AND gate, an adder gate and an exclusive OR gate using a half adder that uses a superconductor rapid single flux quantum logic device. The ALU using a half adder includes a half adder using a superconductor rapid single flux quantum logic device as a logic circuit, and a switching unit that has input ports respectively connected to a sum output port and a carry output port of the half adder and is operated as an OR gate, an AND gate, an adder gate and an exclusive OR gate using output signals of the half adder. The switching unit includes a first switch having an input port connected to the sum output port of the half adder, a second switch having an input port connected to the carry output port of the half adder and an output port connected to an output port of the first switch, and a third switch having an input port connected to the carry output port of the half adder.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: May 20, 2008
    Assignee: Industry-Academic Cooperation Foundation University of Incheon
    Inventors: Ku Rak Jung, Jun Hee Kang, Alex F. Kirichenko, Saad Sarwana
  • Publication number: 20070077906
    Abstract: Digital mixers which permit mixing of asynchronous signals is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
    Type: Application
    Filed: October 4, 2005
    Publication date: April 5, 2007
    Applicant: HYPRES, INC.
    Inventors: Alexander Kirichenko, Deepnarayan Gupta, Saad Sarwana
  • Publication number: 20050235027
    Abstract: The present invention discloss an ALU that can be operated as an OR gate, an AND gate, an adder gate and an exclusive OR gate using a half adder that uses a superconductor rapid single flux quantum logic device. The ALU using a half adder includes a half adder using a superconductor rapid single flux quantum logic device as a logic circuit, and a switching unit that has input ports respectively connected to a sum output port and a carry output port of the half adder and is operated as an OR gate, an AND gate, an adder gate and an exclusive OR gate using output signals of the half adder. The switching unit includes a first switch having an input port connected to the sum output port of the half adder, a second switch having an input port connected to the carry output port of the half adder and an output port connected to an output port of the first switch, and a third switch having an input port connected to the carry output port of the half adder.
    Type: Application
    Filed: May 20, 2004
    Publication date: October 20, 2005
    Inventors: Ku Jung, Jun Kang, Alex Kirichenko, Saad Sarwana
  • Patent number: 6653962
    Abstract: A dual function superconducting digitizer circuit which can selectively function either as an analog-to-digital converter (ADC) or as a time-to-digital converter (TDC). Superconducting ADCs and TDCs can provide performance far superior to that obtained using conventional electronics by taking advantage of the intrinsic properties—high switching speed, quantum accuracy, dispersion-less transmission lines, radiation hardness, and extremely low power dissipation—of superconductivity. Since both ADC and TDC functions are desired in most measurement systems, a dual-function digitizer is not only more attractive from a system integration perspective but is also more marketable.
    Type: Grant
    Filed: October 19, 2001
    Date of Patent: November 25, 2003
    Inventors: Deepnarayan Gupta, Saad Sarwana, Alex Kirichenko, Oleg Mukhanov
  • Publication number: 20030076251
    Abstract: A dual function superconducting digitizer circuit which can selectively function either as an analog-to-digital converter (ADC) or as a time-to-digital converter (TDC). Superconducting ADCs and TDCs can provide performance far superior to that obtained using conventional electronics by taking advantage of the intrinsic properties—high switching speed, quantum accuracy, dispersion-less transmission lines, radiation hardness, and extremely low power dissipation—of superconductivity. Since both ADC and TDC functions are desired in most measurement systems, a dual-function digitizer is not only more attractive from a system integration perspective but is also more marketable.
    Type: Application
    Filed: October 19, 2001
    Publication date: April 24, 2003
    Inventors: Deepnarayan Gupta, Saad Sarwana, Alex Kirichenko, Oleg Mukhanov