Patents by Inventor Saburo Nasu

Saburo Nasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100157662
    Abstract: In one embodiment of the present invention, an MRAM is an MRAM including: a plurality of write word lines; a plurality of bit lines provided so as to intersect with the write word lines; and TMR elements provided at respective intersections of the write word lines and the bit lines. Each of the TMR elements includes a first ferromagnetic layer of which magnetization direction is variable, a second ferromagnetic layer of which magnetization direction is fixed, and a tunnel wall which is sandwiched between the first ferromagnetic layer and the second ferromagnetic layer. The bit line is provided, for example, so as to bulge in the direction in which the write word line extends at the intersection of the bit line and the write word line, so that a magnetic wall is introduced at a desired position of the bit line. Further, a current fed through the bit line is fed through the first ferromagnetic layer at the time of data writing. This makes it possible to provide the MRAM having a gigabit-class capacity.
    Type: Application
    Filed: April 26, 2006
    Publication date: June 24, 2010
    Inventors: Teruo Ono, Akinobu Yamaguchi, Saburo Nasu