Patents by Inventor Sachie Sugitani

Sachie Sugitani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150351241
    Abstract: A ceramic wiring substrate and method for manufacturing the same, the substrate having an up-and-down conduction body which is made by forming a porous structure body from a high melting point metal and then infiltrating a low-resistance metal in an up-and-down conduction hole subsequently formed in a substrate made in a plate shape through sintering a ceramic precursor, the conduction body having a normal composite structure without an abnormally grown particle, a void, a crack and the like and not having a problem of falling off from the substrate, as well as provided a semiconductor device using this substrate. An intermediate layer formed of at least one selected from a group of Mo, W, Co, Fe, Zr, Re, Os, Ta, Nb, Ir, Ru and Hf is formed on an inner surface of the up-and-down conduction hole of the substrate before being provided with the conduction body having the composite structure.
    Type: Application
    Filed: December 17, 2013
    Publication date: December 3, 2015
    Inventors: Yoshiyuki Hirose, Sachie Sugitani, Norihito Goma, Gouhei Toyoshima, Noboru Uenishi