Abstract: An electronic device may include an electronic display having multiple display pixels to display an image based on analog voltage signals. The electronic device may also include optical calibration circuitry to generate digital-to-analog converter (DAC) data based on image data associated with the image and dither circuitry to reduce a bit-depth of the DAC data, generating dithered DAC data. Additionally, the electronic device may include a gamma generator having one or more DACs to generate the analog voltage signals based on the dithered DAC data, which may instruct the gamma generator to generate the analog voltage signals indicative of the image data.

Abstract: An electronic device may include an electronic display having multiple display pixels to display an image based on analog voltage signals. The electronic device may also include optical calibration circuitry to generate digital-to-analog converter (DAC) data based on image data associated with the image and dither circuitry to reduce a bit-depth of the DAC data, generating dithered DAC data. Additionally, the electronic device may include a gamma generator having one or more DACs to generate the analog voltage signals based on the dithered DAC data, which may instruct the gamma generator to generate the analog voltage signals indicative of the image data.

Abstract: Aspects of the subject technology relate to electronic device display circuitry and methods of operating the display. The display circuitry a panel driver interface that decodes digital display data, for each display frame, received from host circuitry of the electronic device. The digital display data includes error correction and detection information for frame and line configuration information distributed in a frame packet and multiple line packets for each display frame. The frame and line configuration information facilitates, efficient, low-error, digital control of various display operational features.

Abstract: A wiring substrate includes a first substrate including a wiring layer and a solder resist layer that partially covers the wiring layer. The solder resist layer includes a circular opening partially exposing the wiring layer and a support partially covering the wiring layer within the opening. The wiring layer includes a first connection pad exposed in the opening and formed by a portion of the wiring layer located at an outer side of the support. The wiring substrate further includes a cylindrical connection pin and a bonding member that bonds a first end surface of the connection pin and the first connection pad located in the opening.

Abstract: Aspects of the subject technology relate to electronic device display circuitry and methods of operating the display. The display circuitry a panel driver interface that decodes digital display data, for each display frame, received from host circuitry of the electronic device. The digital display data includes error correction and detection information for frame and line configuration information distributed in a frame packet and multiple line packets for each display frame. The frame and line configuration information facilitates, efficient, low-error, digital control of various display operational features.

Abstract: A wiring substrate includes a first substrate including a wiring layer and a solder resist layer that partially covers the wiring layer. The solder resist layer includes a circular opening partially exposing the wiring layer and a support partially covering the wiring layer within the opening. The wiring layer includes a first connection pad exposed in the opening and formed by a portion of the wiring layer located at an outer side of the support. The wiring substrate further includes a cylindrical connection pin and a bonding member that bonds a first end surface of the connection pin and the first connection pad located in the opening.

Abstract: A wiring board includes: a connection pad; an insulating layer that covers the connection pad and has an opening portion exposing a portion of the connection pad; and a metal pin that is disposed on the insulating layer and that is connected to the connection pad through a metal bonding material provided in the opening portion. The opening portion includes a main opening portion, and a plurality of protrusive opening portions that communicate with the main opening portion and that protrude outward from an outer circumference of the main opening portion. An outer circumference of a lower end surface of the metal pin, which is opposed to the insulating layer, is located outside the outer circumference of the main opening portion.

Abstract: A solder bump forming method of carrying out a reflow treatment over a conductive ball mounted on a plurality of pads, thereby forming a solder bump, includes a metal film forming step of forming a metal film capable of chemically reacting to a tackifying compound on the pads, an organic sticking layer forming step of causing a solution containing the tackifying compound to chemically react to the metal film, thereby forming an organic sticking layer on the metal film, and a conductive ball mounting step of supplying the conductive ball on the pads having the organic sticking layer formed thereon, thereby mounting the conductive ball on the pads through the metal film.

Abstract: A solder bump forming method of carrying out a reflow treatment over a conductive ball mounted on a plurality of pads, thereby forming a solder bump, includes a metal film forming step of forming a metal film capable of chemically reacting to a tackifying compound on the pads, an organic sticking layer forming step of causing a solution containing the tackifying compound to chemically react to the metal film, thereby forming an organic sticking layer on the metal film, and a conductive ball mounting step of supplying the conductive ball on the pads having the organic sticking layer formed thereon, thereby mounting the conductive ball on the pads through the metal film.

Abstract: A method of manufacturing a circuit substrate of the present invention, includes the steps of forming an n-layered (n is an integer of 1 or more) wiring layer connected electrically to a metal plate on the metal plate, forming an electroplating layer on a connection pad portion of an uppermost wiring layer of the n-layered wiring layer by an electroplating utilizing the metal plate and the wiring layer as a plating power-supply path, and removing the metal plate.

Abstract: A pad structure for a circuit board including a phosphorus-containing nickel layer is provided, capable of improving a tensile strength of a solder member such as a solder ball mounted thereon or a foreign member soldered thereto. The pad structure (40) is a multi-layer plated structure provided in a conductor pattern of the substrate, for mounting the solder bump (20) thereon, and formed as part of the conductor pattern, including a metal layer (10) formed as part of the conductor pattern to constitute a pad body, a phosphorus-containing nickel layer (12) formed by an electroless nickel plating to be directly brought into contact with the metal layer, a copper layer (14) thinner than the nickel layer, formed on the nickel layer by an electroless copper plating, and a precious metal layer (16) formed on the copper layer by an electroless precious metal plating.

Abstract: A method of manufacturing a circuit substrate of the present invention, includes the steps of forming an n-layered (n is an integer of 1 or more) wiring layer connected electrically to a metal plate on the metal plate, forming an electroplating layer on a connection pad portion of an uppermost wiring layer of the n-layered wiring layer by an electroplating utilizing the metal plate and the wiring layer as a plating power-supply path, and removing the metal plate.

Abstract: To avoid a reduction in the efficiency of data transmission of a data processing device that conducts data communications using a serial bus that conforms to the IEEE 1394 Standards. The data processing device 1 has a calculator 9 and a comparator 8. The calculator 9 calculates the data volume of a response packet intended for reception that corresponds to a request packet intended for transmission when an attempt is made to transmit these packets, the comparator 8 compares the data volume of the response packet intended for reception and the empty volume of the receiving buffer 7, and when the empty volume of the receiving buffer 7 is smaller than the data volume of the response packet intended for reception, the packet transmitting device 3 does not transmits the request packet intended for transmission to the IEEE 1394 bus 6, and if the empty volume of the receiving buffer is too small and the response packet cannot be received, the request packet is not transmitted.

Abstract: Deter the lowering of the efficiency of data exchange in a data processing device that conducts data communications by using a serial bus conforming to the IEEF 1394 Standards.

Abstract: Animal cells are cultured while embedded in a collagen gel. The gel containing cells is formed by dispersing animal cells in a collagen solution, placing a drop (or drops) of the cell-containing collagen solution on a support surface and allowing the drop to gel to fix on the surface as a globular collagen gel having a convex surface. The cells are cultured by contacting the gel with a culture medium that may be serum-free or contain dextran sulfate. The drop preferably contains about 3 to about 300 microliters of the collagen solution and is about 2 mm or less in height. The cells may be precultured on a support surface having a collagen layer, released from the collagen layer by treatment with collagenase and dispersed in the collagen solution. The cells can be evaluated after culturing by staining such as with neutral red, or with fluorescein diacetate and irradiating, or by photographing cells in the collagen gel.

Abstract: The present invention relates to a method of testing the sensitivity of cancer drugs with cancer cells cultured in vitro. Cancer cells are cultured in a collagen gel substrate. A wide variety of human cancer cell types readily proliferate in the collagen gel substrate, however, fibroblast cells proliferate as well. The measurement of the growth of the cancer cells is hindered by the presence of the fibroblast cells. The present invention solves this problem by counting the number of colonies with an image processor which selectively extracts the image signals of cancer cells and their colonies. In a second embodiment, the growth of cancer cells is determined by measuring the volume of colonies with the image signals of cancer cells and their colonies selectively extracted. The results can be obtained effectively within a short period of time.