Abstract: One embodiment of the invention includes a method for preventing a plurality of electronic devices from being pulled out of an equipment rack simultaneously. The method includes determining with an electronic sensor module whether an electronic device of a plurality of electronic devices coupled to the equipment rack is being slid out of the equipment rack. Provided the electronic device is being slid out of the equipment rack, an electronic locking module prevents any remaining electronic device of the plurality of electronic devices from being slid out of the equipment rack. A determination is made as to whether the electronic device has been slid back into the equipment rack. Provided the electronic device has been slid back into the equipment rack, the prevention is deactivated.

Abstract: An interface allows communication between a host device coupled to a host bus and a target device coupled to a target bus. First, the interface receives the address of the target device from the host device via the host bus, where the address has a first width. Next, the interface converts the received address from the first width into one or more address components each having a second width. Then, the circuit accesses the target device by driving the one or more address components onto the target bus. Such an interface allows for a simple, direct communication path between the host bus bus, such as a system bus, and a target bus, such as an LPC bus. The interface consolidates several tasks into one general purpose interface, providing a savings in components used, design complexity, and overall cost of implementation. Further, the length of time required for communications between interfaced busses is substantially reduced.

Abstract: A method and system for system-management event detection, consolidation, reporting and storage is provided. The method and system may be used in a computer system for above-mentioned purposes. The method and system may be connected to central processing unit through a memory interface. The method and system comprises several system-management event sources that monitor system management events in the computer system. Each system-management-event source is connected to at least one system-management-event node that is in a communication connection with a system-management event-module. Each system-management-event node is operable to detect and transmit data about system-management events to the system-management-event module. The system-management-event module is able to report the occurrence of an event, is able to store data about system-management events and is operable to transmit data about system-management events to the central processing unit.

Abstract: A firmware selector is provided for a computer that includes a processor. The selector receives the identity of the processor, and in response to the identity, causes the processor to access firmware that corresponds to the processor. Because such a selector can automatically direct the processor to the appropriate firmware when the computer stores multiple firmware, the selector allows a customer to change the processor without requiring him to change the firmware memory or the board on which the firmware memory resides.

Abstract: A data-protection circuit selectively allows access to data stored in a memory. Specifically, the circuit receives an authorization key and allows access to the data if the authorization key equals a predetermined value. Such a circuit can be used to prevent an unauthorized agent such as an unauthorized update package, a virus, or a hacker from reading or corrupting data such as firmware because the agent presumably will not have or be able to obtain the authorization key. Furthermore, by disposing the data-protection circuit and memory on separate integrated circuits (ICs), one can implement data protection without altering the design of the memory IC. This allows one to implement data protection for off-the-shelf memory ICs that include no integrated protection circuit. For example, one can implement the data-protection circuit in a field-programmable gate array (FPGA) that is coupled to but separate from the memory IC.