Patents by Inventor SACHIN K. GUPTA

SACHIN K. GUPTA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9760664
    Abstract: An approach is provided in which an information handling system executes multiple timing constraint sensitivity tests on a circuit model using a first signal arrival time and generates multiple test results. The information handling system compares the multiple test results with a pre-determined probability threshold and, in response to determining that an amount of test failures included in the multiple test results meets a pre-determined failure probability threshold, the information handling system computes a timing constraint sensitivity of the circuit model based upon the first signal arrival time.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Sachin K. Gupta, Vasant B. Rao, Suriya T. Skariah, James E. Sundquist, James D. Warnock
  • Patent number: 9760665
    Abstract: An approach is provided in which an information handling system executes multiple timing constraint sensitivity tests on a circuit model using a first signal arrival time and generates multiple test results. The information handling system compares the multiple test results with a pre-determined probability threshold and, in response to determining that an amount of test failures included in the multiple test results meets a pre-determined failure probability threshold, the information handling system computes a timing constraint sensitivity of the circuit model based upon the first signal arrival time.
    Type: Grant
    Filed: August 22, 2015
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Sachin K. Gupta, Vasant B. Rao, Suriya T. Skariah, James E. Sundquist, James D. Warnock
  • Publication number: 20170011153
    Abstract: An approach is provided in which an information handling system executes multiple timing constraint sensitivity tests on a circuit model using a first signal arrival time and generates multiple test results. The information handling system compares the multiple test results with a pre-determined probability threshold and, in response to determining that an amount of test failures included in the multiple test results meets a pre-determined failure probability threshold, the information handling system computes a timing constraint sensitivity of the circuit model based upon the first signal arrival time.
    Type: Application
    Filed: August 22, 2015
    Publication date: January 12, 2017
    Inventors: SACHIN K. GUPTA, VASANT B. RAO, SURIYA T. SKARIAH, JAMES E. SUNDQUIST, JAMES D. WARNOCK
  • Publication number: 20170011154
    Abstract: An approach is provided in which an information handling system executes multiple timing constraint sensitivity tests on a circuit model using a first signal arrival time and generates multiple test results. The information handling system compares the multiple test results with a pre-determined probability threshold and, in response to determining that an amount of test failures included in the multiple test results meets a pre-determined failure probability threshold, the information handling system computes a timing constraint sensitivity of the circuit model based upon the first signal arrival time.
    Type: Application
    Filed: July 7, 2015
    Publication date: January 12, 2017
    Inventors: SACHIN K. GUPTA, VASANT B. RAO, SURIYA T. SKARIAH, JAMES E. SUNDQUIST, JAMES D. WARNOCK