Patents by Inventor Sachin Rao Bandigadi

Sachin Rao Bandigadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7768351
    Abstract: Variable gain circuitry includes a first input transistor (M1) having a source coupled to a first conductor (32), a gate coupled to a first input voltage (Vin+), and a drain coupled to a second conductor (30). An input of a first current mirror (M3,M4) is coupled to the second conductor to receive a current corresponding to the difference between the first input voltage and a second input voltage (Vin?). An output of the first current mirror is coupled to a source of current (M2). A first transistor (M5) has a gate coupled to a third conductor (31), a source coupled to a reference voltage (VSS), and a drain coupled to conduct output current (Iout). A second transistor (M6) and a resistive element (M7) are coupled in series between the third conductor and the first reference voltage (VSS), a gate of the second transistor being coupled to the third conductor to produce a nonlinear relationship between currents of the first transistor and the second transistor.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: August 3, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Vadim V. Ivanov, Keith E. Kunz, Sachin Rao Bandigadi, Prasadu Naga Venkata Mangina
  • Publication number: 20090322429
    Abstract: Variable gain circuitry includes a first input transistor (M1) having a source coupled to a first conductor (32), a gate coupled to a first input voltage (Vin+), and a drain coupled to a second conductor (30). An input of a first current mirror (M3,M4) is coupled to the second conductor to receive a current corresponding to the difference between the first input voltage and a second input voltage (Vin?). An output of the first current mirror is coupled to a source of current (M2). A first transistor (M5) has a gate coupled to a third conductor (31), a source coupled to a reference voltage (VSS), and a drain coupled to conduct output current (Iout). A second transistor (M6) and a resistive element (M7) are coupled in series between the third conductor and the first reference voltage (VSS), a gate of the second transistor being coupled to the third conductor to produce a nonlinear relationship between currents of the first transistor and the second transistor.
    Type: Application
    Filed: June 25, 2008
    Publication date: December 31, 2009
    Inventors: Vadim V. Ivanov, Keith E. Kunz, Sachin Rao Bandigadi, Prasadu Naga Venkata Mangina