Patents by Inventor Sachio KODAMA

Sachio KODAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220392819
    Abstract: A semiconductor device includes a semiconductor element, a sealing member, and a first conductive plate. The semiconductor element includes a first electrode. The sealing member seals the semiconductor element. The first conductive plate includes a first surface facing the first electrode inside the sealing member. The first surface of the first conductive plate includes a mounting region, a roughened region and a non-roughened region. The first electrode is joined to the mounting region. The roughened region is located around the mounting region. The non-roughened region is located between the roughened region and an outer peripheral edge of the first surface. Surface roughness of the roughened region is larger than surface roughness of the non-roughened region.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 8, 2022
    Inventors: Sachio KODAMA, Hiroaki YOSHIZAWA, Masanori OOSHIMA, Takahiro HIRANO
  • Patent number: 10727146
    Abstract: A semiconductor device may include a semiconductor element including a signal pad, an encapsulant encapsulating the semiconductor element and a lead including a first end located outside the encapsulant and a second end located within the encapsulant. The lead may be connected to the signal pad via a bonding wire within the encapsulant. The lead may include an upper surface extending from the first end to the second end. The upper surface may include a joined section where the bonding wire is joined and a rough section located within the encapsulant and having a higher surface roughness than the joined section. The rough section may be at least partly located lower than the joined section.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: July 28, 2020
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Naoya Take, Sachio Kodama, Masanori Ooshima
  • Publication number: 20190131199
    Abstract: A semiconductor device may include a semiconductor element including a signal pad, an encapsulant encapsulating the semiconductor element and a lead including a first end located outside the encapsulant and a second end located within the encapsulant. The lead may be connected to the signal pad via a bonding wire within the encapsulant. The lead may include an upper surface extending from the first end to the second end. The upper surface may include a joined section where the bonding wire is joined and a rough section located within the encapsulant and having a higher surface roughness than the joined section. The rough section may be at least partly located lower than the joined section.
    Type: Application
    Filed: October 29, 2018
    Publication date: May 2, 2019
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Naoya TAKE, Sachio KODAMA, Masanori OOSHIMA
  • Patent number: 10153241
    Abstract: A semiconductor device is provided. The semiconductor device includes an electrode pad provided above a semiconductor substrate; and a wire bonded on the electrode pad and including copper. The electrode pad includes an electrode layer including aluminum and a support layer harder than the wire and the electrode layer. The wire is in contact with the electrode layer and the support layer.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: December 11, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takemasa Watanabe, Naoya Take, Sachio Kodama
  • Publication number: 20180218987
    Abstract: A semiconductor device is provided. The semiconductor device includes an electrode pad provided above a semiconductor substrate; and a wire bonded on the electrode pad and including copper. The electrode pad includes an electrode layer including aluminum and a support layer harder than the wire and the electrode layer. The wire is in contact with the electrode layer and the support layer.
    Type: Application
    Filed: December 27, 2017
    Publication date: August 2, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takemasa WATANABE, Naoya TAKE, Sachio KODAMA