Abstract: An integrated circuit having a plurality of miniaturized transistors, wherein the plurality of transistors include: high concentration transistors which include channel regions having impurity concentrations of a first concentration; and low concentration transistors which include channel regions having impurity concentrations of a second concentration lower than the first concentration.

Abstract: A differential circuit includes a differential pair and a back gate bias circuit. The differential circuit includes a first MOS transistor and a second MOS transistor provided between a first power supply line, to which a first power supply voltage is applied, and a second power supply line, to which a second power supply voltage is applied. The back gate bias circuit applies a bias voltage closer to the first power supply voltage than source potentials of the first MOS transistor and the second MOS transistor to back gates of the first MOS transistor and the second MOS transistor.

Abstract: A differential circuit includes a differential pair and a back gate bias circuit. The differential circuit includes a first MOS transistor and a second MOS transistor provided between a first power supply line, to which a first power supply voltage is applied, and a second power supply line, to which a second power supply voltage is applied. The back gate bias circuit applies a bias voltage closer to the first power supply voltage than source potentials of the first MOS transistor and the second MOS transistor to back gates of the first MOS transistor and the second MOS transistor.

Abstract: An integrated circuit having a plurality of miniaturized transistors, wherein the plurality of transistors include: high concentration transistors which include channel regions having impurity concentrations of a first concentration; and low concentration transistors which include channel regions having impurity concentrations of a second concentration lower than the first concentration.

Abstract: A control circuit of a digital control power circuit is provided. The control circuit includes a feedback controller configured to generate a digital duty command value such that a digital feedback value corresponding to an output voltage of the digital control power circuit is close to a target value thereof, a pulse generator configured to generate a pulse signal having a duty ratio corresponding to the digital duty command value, a non-linear controller configured to correct a pulse width of the pulse signal when a variation in the output voltage is detected, and a driver configured to drive a switching device of the digital control power circuit depending on the pulse signal.

Abstract: A main amplifier generates an output signal SOUT according to a difference between first and second voltages VP and VN. A first gm amplifier is arranged as a differential input stage. A second, fully differential, gm amplifier amplifies a voltage difference between its non-inverting and inverting input terminals, and outputs a differential current signal I3N/I3P via its inverting and non-inverting output terminals. An integrator integrates a differential input current I4P/I4N input via its non-inverting and inverting input terminals, and samples and holds the signal every predetermined period, to generate a differential voltage signal. A first selector is arranged as an upstream stage of the second gm amplifier, and outputs the differential input signal without change or otherwise after swapping. A second selector is arranged as a downstream stage of the second gm amplifier, and outputs the signal I3N/I3P output from the second gm amplifier without change or otherwise after swapping.

Abstract: A main amplifier generates an output signal SOUT according to a difference between first and second voltages VP and VN. A first gm amplifier is arranged as a differential input stage. A second, fully differential, gm amplifier amplifies a voltage difference between its non-inverting and inverting input terminals, and outputs a differential current signal I3N/I3P via its inverting and non-inverting output terminals. An integrator integrates a differential input current I4P/I4N input via its non-inverting and inverting input terminals, and samples and holds the signal every predetermined period, to generate a differential voltage signal. A first selector is arranged as an upstream stage of the second gm amplifier, and outputs the differential input signal without change or otherwise after swapping. A second selector is arranged as a downstream stage of the second gm amplifier, and outputs the signal I3N/I3P output from the second gm amplifier without change or otherwise after swapping.

Abstract: A control circuit of a digital control power circuit is provided. The control circuit includes a feedback controller configured to generate a digital duty command value such that a digital feedback value corresponding to an output voltage of the digital control power circuit is close to a target value thereof, a pulse generator configured to generate a pulse signal having a duty ratio corresponding to the digital duty command value, a non-linear controller configured to correct a pulse width of the pulse signal when a variation in the output voltage is detected, and a driver configured to drive a switching device of the digital control power circuit depending on the pulse signal.

Abstract: An analog signal is input to an input terminal. An analog signal is output via an output terminal. A first transistor is an N-channel MOSFET, and is provided between the input terminal and the output terminal. A first resistor is provided between the gate of the first transistor and a first fixed voltage terminal (power supply terminal), which sets the gate of the first transistor to a high-impedance state.

Abstract: An analog signal is input to an input terminal. An analog signal is output via an output terminal. A first transistor is an N-channel MOSFET, and is provided between the input terminal and the output terminal. A first resistor is provided between the gate of the first transistor and a first fixed voltage terminal (power supply terminal), which sets the gate of the first transistor to a high-impedance state.

Abstract: In a charging circuit charging a battery based on a power supply voltage from an external power supply, a charging transistor is provided on a path from the external power supply to the battery. A charging control circuit is integrated on a semiconductor substrate, and adjusts an ON state of the charging transistor to control a charging current supplied to the battery. The voltage adjusting circuit provided on an electric power supply path from the external power supply to a power supply terminal of the charging control circuit generates a necessary voltage drop. The current adjusting circuit adjusts the ON state of the charging transistor such that a voltage of the battery is brought close to a predetermined voltage value. The clamp circuit clamps a voltage at the power supply terminal of the charging control circuit below a predetermined clamp voltage.

Abstract: An analog signal is input to an input terminal. An analog signal is output via an output terminal. A first transistor is an N-channel MOSFET, and is provided between the input terminal and the output terminal. A first resistor is provided between the gate of the first transistor and a first fixed voltage terminal (power supply terminal), which sets the gate of the first transistor to a high-impedance state.

Abstract: In a charging circuit charging a battery based on a power supply voltage from an external power supply, a charging transistor is provided on a path from the external power supply to the battery. A charging control circuit is integrated on a semiconductor substrate, and adjusts an ON state of the charging transistor to control a charging current supplied to the battery. The voltage adjusting circuit provided on an electric power supply path from the external power supply to a power supply terminal of the charging control circuit generates a necessary voltage drop. The current adjusting circuit adjusts the ON state of the charging transistor such that a voltage of the battery is brought close to a predetermined voltage value. The clamp circuit clamps a voltage at the power supply terminal of the charging control circuit below a predetermined clamp voltage.

Abstract: An electronic apparatus includes a display device (20) and a drive device (10) for driving the display (20). The display device (20) is equipped with light emitting elements (21-26) such as LEDs driven at high voltages. The display device (20) has a multiplicity of light emitting element series each supplied at one end thereof with a high voltage (Vh) higher than a given power supply voltage (Vdd). The drive device (10) has drivers (12-14) each having one end connected to a respective terminal to which a corresponding one of said multiple light emitting elements series is connected. The drivers are turned ON and OFF in accordance with instruction signals (S1-S3) such that, when turned ON, they provide currents to the series connected. The drive device (10) also has a multiplicity of bypass current source (15-17) for providing the light emitting element series with currents not sufficient to activate the series for emission of light when corresponding drivers are turned OFF.

Abstract: An electronic apparatus is equipped with light emitting elements (21-26) such as LEDs. The light emitting elements are driven by a power supply circuit of the drive device (10) at a high step-up voltage (Vh). The drive device (10) has a multiplicity of constant-current drivers (12-14), a selection circuit (18), and a control circuit (11). The drivers are turned ON or OFF in accordance with respective instruction signals (S1-S3) supplied thereto to provide associated series with currents to activate the series for emission of light when associated drivers are turned ON. The selection circuit (18) selects the lowest one of the voltages impressed on the drivers and outputs the selected lowest voltage as a detection voltage. The control circuit (11) automatically controls the voltage Vh so as to equilibrate the detection voltage with a low reference voltage at which the drivers can perform required constant-current operations.

Abstract: An electronic apparatus is equipped with light emitting elements (21-26) such as LEDs. The light emitting elements are driven by a power supply circuit of the drive device (10) at a high step-up voltage (Vh). The drive device (10) has a multiplicity of constant-current drivers (12-14), a selection circuit (18), and a control circuit (11). The drivers are turned ON or OFF in accordance with respective instruction signals (S1-S3) supplied thereto to provide associated series with currents to activate the series for emission of light when associated drivers are turned ON. The selection circuit (18) selects the lowest one of the voltages impressed on the drivers and outputs the selected lowest voltage as a detection voltage. The control circuit (11) automatically controls the voltage Vh so as to equilibrate the detection voltage with a low reference voltage at which the drivers can perform required constant-current operations.

Abstract: An electronic apparatus includes a display device (20) and a drive device (10) for driving the display (20). The display device (20) is equipped with light emitting elements (21-26) such as LEDs driven at high voltages. The display device (20) has a multiplicity of light emitting element series each supplied at one end thereof with a high voltage (Vh) higher than a given power supply voltage (Vdd). The drive device (10) has drivers (12-14) each having one end connected to a respective terminal to which a corresponding one of said multiple light emitting elements series is connected. The drivers are turned ON and OFF in accordance with instruction signals (S1-S3) such that, when turned ON, they provide currents to the series connected. The drive device (10) also has a multiplicity of bypass means (15-17) for providing the light emitting element series with currents not sufficient to activate the series for emission of light when corresponding drivers are turned OFF.

Abstract: A DC/DC converter is provided with a DC power source; a reference voltage generating circuit; an amplifier which receives an electric power from the DC power source and outputs an electric power of which voltage is controlled so as to assume a target voltage value by stepping down the voltage of the electric power from the DC power source depending on a difference between the reference voltage and a detection voltage; an oscillation circuit which generates signals having a specific frequency; a voltage boosting circuit which receives the output of the amplifier and the output of the oscillation circuit, causes switching of the output of the amplifier at the specific frequency to charge a first capacitor, and performs voltage boosting by transferring the electric charges-charged in the first capacitor through complementary ON/OFF switching with respect to the former switching into a second capacitor after raising substantially upto n/m time voltage (wherein n>m and n and m are integers equal to or more than

Abstract: A DC/DC converter is provided with a DC power source; a reference voltage generating circuit; an amplifier which receives an electric power from the DC power source and outputs an electric power of which voltage is controlled so as to assume a target voltage value by stepping down the voltage of the electric power from the DC power source depending on a difference between the reference voltage and a detection voltage; an oscillation circuit which generates signals having a specific frequency; a voltage boosting circuit which receives the output of the amplifier and the output of the oscillation circuit, causes switching of the output of the amplifier at the specific frequency to charge a first capacitor, and performs voltage boosting by transferring the electric charges charged in the first capacitor through complementary ON/OFF switching with respect to the former switching into a second capacitor after raising substantially upto n/m time voltage (wherein n>m and n and m are integers equal to or more than

Abstract: A piezo electric transformer driving circuit and a cold cathode tube illuminating device comprising a series circuit including a switch circuit, a coil and a switching transistor and being connected successively in the named order between a power source line and a ground; a piezo electric transformer of which primary side electrode is connected to a juncture of the coil and the switching transistor; and a drive halting circuit which geneates a first control signal for turning OFF the switching circuit and further generates a second control signal for halting a switching operation of the switching transistor after a predetermined period from the generation of the first control signal, wherein the predetermined period is at least one turned ON interval of the switching transistor and through the switching operation of the switching transistor a high voltage is generated at a secondary side of the piezo electric transformer.