Patents by Inventor Sadahiro Sugimoto

Sadahiro Sugimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240295968
    Abstract: A storage system includes a non-volatile storage device and a plurality of storage controllers that control reading and writing for the storage device, in which each of the plurality of storage controllers includes a processor and a memory, the storage controller stores a write request from a host for the storage device as cache data in the memory, returns a write completion response to the host after protecting the cache data in a first memory protection method or a second memory protection method, and destages the cache data into the storage device after the write completion response, and the storage controller switches between the first memory protection method and the second memory protection method to be used according to an operation state of another storage controller.
    Type: Application
    Filed: September 15, 2023
    Publication date: September 5, 2024
    Inventors: Sadahiro SUGIMOTO, Norio SHIMOZONO, Tomohiro YOSHIHARA, Shintaro ITO
  • Patent number: 11816336
    Abstract: The present disclosure is to optimize processes in a storage system. A storage system includes: a first controller including a first computing device and a first memory; a second controller including a second computing device and a second memory; and an interface circuit that transfers data between the first controller and the second controller. The interface circuit reads first compressed data from the second memory. The interface circuit decompresses the first compressed data to generate first uncompressed data, and writes the first uncompressed data into the first memory.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: November 14, 2023
    Assignee: HITACHI, LTD.
    Inventors: Naoya Okada, Takashi Nagao, Kentaro Shimada, Ryosuke Tatsumi, Sadahiro Sugimoto
  • Publication number: 20230136735
    Abstract: The present disclosure is to optimize processes in a storage system. A storage system includes: a first controller including a first computing device and a first memory; a second controller including a second computing device and a second memory; and an interface circuit that transfers data between the first controller and the second controller. The interface circuit reads first compressed data from the second memory. The interface circuit decompresses the first compressed data to generate first uncompressed data, and writes the first uncompressed data into the first memory.
    Type: Application
    Filed: December 19, 2022
    Publication date: May 4, 2023
    Inventors: Naoya OKADA, Takashi NAGAO, Kentaro SHIMADA, Ryosuke TATSUMI, Sadahiro SUGIMOTO
  • Patent number: 11543972
    Abstract: The present disclosure is to optimize processes in a storage system. A storage system includes: a first controller including a first computing device and a first memory; a second controller including a second computing device and a second memory; and an interface circuit that transfers data between the first controller and the second controller. The interface circuit reads first compressed data from the second memory. The interface circuit decompresses the first compressed data to generate first uncompressed data, and writes the first uncompressed data into the first memory.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: January 3, 2023
    Assignee: HITACHI, LTD.
    Inventors: Naoya Okada, Takashi Nagao, Kentaro Shimada, Ryosuke Tatsumi, Sadahiro Sugimoto
  • Patent number: 11366614
    Abstract: The storage system includes a controller and a storage drive accessible from the controller. The controller includes a memory and a processing unit. The memory includes a first cache area in which the writing of data by the storage drive is permitted, and a second cache area in which the writing of data by the storage drive is prohibited. A In the first cache area, the storage of data, by staging-in-advance in response to a read request for a sequential read, by the processing unit is permitted, and the storage of cache data in a dirty state by the processing unit is prohibited. In the second cache area, the storage of the cache data in the dirty state by the processing unit is permitted.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: June 21, 2022
    Assignee: Hitachi, Ltd.
    Inventors: Naoya Okada, Tomohiro Yoshihara, Sadahiro Sugimoto, Takashi Ochi, Jun Miyashita, Toshiya Seki
  • Patent number: 11301159
    Abstract: A storage system includes at least one drive chassis connected to at least one host computer via a first network, and a storage controller connected to the drive chassis, in which the storage controller instructs the drive chassis to create a logical volume, and the drive chassis creates a logical volume according to an instruction from the storage controller, provides a storage area of the storage system to the host computer, and receives an IO command from the host computer to the storage area of the storage system.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: April 12, 2022
    Assignee: HITACHI, LTD.
    Inventors: Hirotoshi Akaike, Koji Hosogi, Norio Shimozono, Sadahiro Sugimoto, Nobuhiro Yokoi, Ryosuke Tatsumi
  • Patent number: 11256585
    Abstract: A storage system includes a first storage controller including a plurality of main storage media and one or more processor cores, and a second storage controller including a plurality of main storage media and one or more processor cores and performing communication with the first storage controller. Storage areas of the main storage media in the first storage controller are allocated to an address map. In response to the occurrence of failures in one or mode main storage media of the main storage media of the first storage controller, the first storage controller performs restarting to reallocate the storage areas of the main storage media excluding one or more main storage media having caused the failures to an address map reduced than before the occurrence of the failures. The second storage controller continues operating during the restarting of the first storage controller.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: February 22, 2022
    Assignee: HITACHI, LTD.
    Inventors: Yoshiaki Deguchi, Naoya Okada, Ryosuke Tatsumi, Kentaro Shimada, Sadahiro Sugimoto
  • Patent number: 11137935
    Abstract: Provided is a storage system in which a plurality of storage controllers communicate with each other and an identifier of each storage controller is determined. The storage system includes a plurality of controllers that receive and process an input and output request specifying any of a plurality of volumes from an external device, and a plurality of switches each having a plurality of ports. The plurality of controllers are connected in parallel to the plurality of switches and communicate with each other via the plurality of switches. Each of the plurality of controllers acquires a plurality of port identifiers identifying a plurality of connected ports from the connected switches, and determines a controller identifier in the storage system based on the acquired plurality of port identifiers.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: October 5, 2021
    Assignee: HITACHI, LTD.
    Inventors: Shinsuke Izawa, Sadahiro Sugimoto
  • Publication number: 20210200473
    Abstract: The storage system includes a controller and a storage drive accessible from the controller. The controller includes a memory and a processing unit. The memory includes a first cache area in which the writing of data by the storage drive is permitted, and a second cache area in which the writing of data by the storage drive is prohibited. A In the first cache area, the storage of data, by staging-in-advance in response to a read request for a sequential read, by the processing unit is permitted, and the storage of cache data in a dirty state by the processing unit is prohibited. In the second cache area, the storage of the cache data in the dirty state by the processing unit is permitted.
    Type: Application
    Filed: September 16, 2020
    Publication date: July 1, 2021
    Applicant: Hitachi, Ltd.
    Inventors: Naoya Okada, Tomohiro Yoshihara, Sadahiro Sugimoto, Takashi Ochi, Jun Miyashita, Toshiya Seki
  • Publication number: 20210034482
    Abstract: A storage system includes a first storage controller including a plurality of main storage media and one or more processor cores, and a second storage controller including a plurality of main storage media and one or more processor cores and performing communication with the first storage controller. Storage areas of the main storage media in the first storage controller are allocated to an address map. In response to the occurrence of failures in one or mode main storage media of the main storage media of the first storage controller, the first storage controller performs restarting to reallocate the storage areas of the main storage media excluding one or more main storage media having caused the failures to an address map reduced than before the occurrence of the failures. The second storage controller continues operating during the restarting of the first storage controller.
    Type: Application
    Filed: March 17, 2020
    Publication date: February 4, 2021
    Applicant: Hitachi, Ltd.
    Inventors: Yoshiaki DEGUCHI, Naoya OKADA, Ryosuke TATSUMI, Kentaro SHIMADA, Sadahiro SUGIMOTO
  • Publication number: 20200379668
    Abstract: A storage system includes at least one drive chassis connected to at least one host computer via a first network, and a storage controller connected to the drive chassis, in which the storage controller instructs the drive chassis to create a logical volume, and the drive chassis creates a logical volume according to an instruction from the storage controller, provides a storage area of the storage system to the host computer, and receives an IO command from the host computer to the storage area of the storage system.
    Type: Application
    Filed: August 18, 2020
    Publication date: December 3, 2020
    Inventors: Hirotoshi AKAIKE, Koji HOSOGI, Norio SHIMOZONO, Sadahiro SUGIMOTO, Nobuhiro YOKOI
  • Patent number: 10789196
    Abstract: Efficient communication between storage controllers can be performed. A storage system includes one or more backend switches that connect a first processor, a second processor, and one or more storage devices to each other. Each backend switch identifies a destination of a frame by referring to the frame received from the first processor. In a case where the destination of the frame is the second processor, each backend switch translates a first address, included in the frame, for specifying a location on the second memory in an address space of the first processor, into a second address for specifying the location on the second memory in an address space of the second processor, and transfers the frame including the second address to the second storage controller.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: September 29, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Tanaka, Kentaro Shimada, Akira Yamamoto, Sadahiro Sugimoto
  • Publication number: 20200301599
    Abstract: A storage system includes at least one drive chassis connected to at least one host computer via a first network, and a storage controller connected to the drive chassis, in which the storage controller instructs the drive chassis to create a logical volume, and the drive chassis creates a logical volume according to an instruction from the storage controller, provides a storage area of the storage system to the host computer, and receives an IO command from the host computer to the storage area of the storage system.
    Type: Application
    Filed: February 18, 2020
    Publication date: September 24, 2020
    Inventors: Hirotoshi AKAIKE, Koji HOSOGI, Norio SHIMOZONO, Sadahiro SUGIMOTO, Nobuhiro YOKOI
  • Patent number: 10782917
    Abstract: High reliability and high performance of a storage device formed of a Dual port NVMe SSD are achieved while preventing the risk of destruction of data. The storage device includes a main memory that belongs to each of two or more clusters and that stores data related to an IO request; and a processor belonging to each of the clusters controlling accesses to the main memory. The main memory includes a first region where writing from the memory drive is permitted and a second region where the writing is prohibited. The processor selects the first region as a transfer destination related to the IO request from the memory drive when the IO request is a first request, and selects the second region as the transfer destination related to the IO request from the memory drive while permitting writing to the second region when the IO request is a second request.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: September 22, 2020
    Assignee: HITACHI, LTD.
    Inventors: Naoya Okada, Masanori Takada, Mitsuo Date, Sadahiro Sugimoto, Norio Simozono
  • Patent number: 10761764
    Abstract: A storage system includes at least one drive chassis connected to at least one host computer via a first network, and a storage controller connected to the drive chassis, in which the storage controller instructs the drive chassis to create a logical volume, and the drive chassis creates a logical volume according to an instruction from the storage controller, provides a storage area of the storage system to the host computer, and receives an IO command from the host computer to the storage area of the storage system.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: September 1, 2020
    Assignee: HITACHI, LTD.
    Inventors: Hirotoshi Akaike, Koji Hosogi, Norio Shimozono, Sadahiro Sugimoto, Nobuhiro Yokoi
  • Patent number: 10732872
    Abstract: Provided is a storage system that includes a plurality of storage devices; a controller that controls the storage device including a processor and a memory; and a data transfer path connecting each of the storage devices to the controller. The storage device is divided into a plurality of groups. The controller specifies the storage device belonging to each of the plurality of groups among the plurality of storage devices connected via the plurality of independent data transfer paths, receives an access request to specify the storage device to be accessed, and designates the different data transfer paths for each group of the specified storage devices. The storage device performs data transfer by a connection-less protocol according to the designated data transfer path.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: August 4, 2020
    Assignee: HITACHI, LTD.
    Inventors: Shotaro Shintani, Kentaro Shimada, Makio Mizuno, Sadahiro Sugimoto
  • Patent number: 10725878
    Abstract: A storage system capable of dynamically securing free space when a certain storage apparatus is disused and reducing the influence on the system upon dynamically securing the free space without having to continuously secure, in a memory of another storage apparatus, free space capable of storing management information of the corresponding storage apparatus in preparation of a case where such storage apparatus is disused. Each storage apparatus comprises a memory including a management information storage area for storing management information and a cache area for storing cache information, and a processor which manages a status of the cache area. At least certain processors determine a storage apparatus to become a copy destination of the copy target management information. The storage apparatus of the copy destination releases at least a part of the cache area and stores the management information in the released cache area.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: July 28, 2020
    Assignee: HITACHI, LTD.
    Inventors: Takashi Nagao, Sadahiro Sugimoto, Tomohiro Kawaguchi, Norio Simozono
  • Publication number: 20200210099
    Abstract: Provided is a storage system in which a plurality of storage controllers communicate with each other and an identifier of each storage controller is determined. The storage system includes a plurality of controllers that receive and process an input and output request specifying any of a plurality of volumes from an external device, and a plurality of switches each having a plurality of ports. The plurality of controllers are connected in parallel to the plurality of switches and communicate with each other via the plurality of switches. Each of the plurality of controllers acquires a plurality of port identifiers identifying a plurality of connected ports from the connected switches, and determines a controller identifier in the storage system based on the acquired plurality of port identifiers.
    Type: Application
    Filed: March 9, 2020
    Publication date: July 2, 2020
    Applicant: HITACHI, LTD.
    Inventors: Shinsuke IZAWA, Sadahiro SUGIMOTO
  • Publication number: 20200192601
    Abstract: High reliability and high performance of a storage device formed of a Dual port NVMe SSD are achieved while preventing the risk of destruction of data. The storage device includes a main memory that belongs to each of two or more clusters and that stores data related to an IO request; and a processor belonging to each of the clusters controlling accesses to the main memory. The main memory includes a first region where writing from the memory drive is permitted and a second region where the writing is prohibited. The processor selects the first region as a transfer destination related to the IO request from the memory drive when the IO request is a first request, and selects the second region as the transfer destination related to the IO request from the memory drive while permitting writing to the second region when the IO request is a second request.
    Type: Application
    Filed: May 12, 2016
    Publication date: June 18, 2020
    Inventors: Naoya OKADA, Masanori TAKADA, Mitsuo DATE, Sadahiro SUGIMOTO, Norio SIMOZONO
  • Publication number: 20200133836
    Abstract: A storage system includes: a memory for caching of data according to input and output to a storage device; and a CPU connected to the memory. The memory includes: a DRAM high in access performance; and an SCM identical in a unit of access to the DRAM, the SCM being lower in access performance than the DRAM. The CPU determines whether to perform caching to the DRAM or the SCM, based on the data according to input and output to the storage device, and caches the data into the DRAM or the SCM, based on the determination.
    Type: Application
    Filed: August 8, 2019
    Publication date: April 30, 2020
    Inventors: Nagamasa MIZUSHIMA, Sadahiro SUGIMOTO, Kentaro SHIMADA