Patents by Inventor Sadamichi Maekawa

Sadamichi Maekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8437168
    Abstract: A Josephson quantum computing device and an integrated circuit using Josephson quantum computing devices which can realize a NOT gate operation controlled with 2 bits will be provided. The Josephson quantum computing device (1) comprises: a superconducting ring member (10) having a ?-junction (6) and a 0-junction (7); and a quantum state detecting member (20) constituted by a superconducting quantum interference device arranged outside of the superconducting ring member, wherein a bonding and an antibonding state brought about by a tunneling effect between a |?> and a |?> state as two states degenerate in energy of the superconducting ring member (10) are regarded as quantum bits. The bonding and antibonding states as the quantum bits are read out by the quantum state detecting member (20). The two bit controlled NOT gate operation can be performed by the two quantum bits comprising said quantum bits.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: May 7, 2013
    Assignee: Japan Science and Technology Agency
    Inventors: Sadamichi Maekawa, Taro Yamashita, Saburo Takahashi
  • Publication number: 20120326130
    Abstract: A Josephson quantum computing device and an integrated circuit using Josephson quantum computing devices which can realize a NOT gate operation controlled with 2 bits will be provided. The Josephson quantum computing device (1) comprises: a superconducting ring member (10) having a ?-junction (6) and a 0-junction (7); and a quantum state detecting member (20) constituted by a superconducting quantum interference device arranged outside of the superconducting ring member, wherein a bonding and an antibonding state brought about by a tunneling effect between a | ? > and a | ? > state as two states degenerate in energy of the superconducting ring member (10) are regarded as quantum bits. The bonding and antibonding states as the quantum bits are read out by the quantum state detecting member (20). The two bit controlled NOT gate operation can be performed by the two quantum bits comprising said quantum bits.
    Type: Application
    Filed: September 7, 2012
    Publication date: December 27, 2012
    Applicant: JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventors: Sadamichi MAEKAWA, Taro YAMASHITA, Saburo TAKAHASHI
  • Patent number: 8284585
    Abstract: A Josephson quantum computing device and an integrated circuit using Josephson quantum computing devices which can realize a NOT gate operation controlled with 2 bits will be provided. The Josephson quantum computing device (1) comprises: a superconducting ring member (10) having a ?-junction (6) and a 0-junction (7); and a quantum state detecting member (20) constituted by a superconducting quantum interference device arranged outside of the superconducting ring member, wherein a bonding and an antibonding state brought about by a tunneling effect between a |?> and a |?> state as two states degenerate in energy of the superconducting ring member (10) are regarded as quantum bits. The bonding and antibonding states as the quantum bits are read out by the quantum state detecting member (20). The two bit controlled NOT gate operation can be performed by the two quantum bits comprising said quantum bits.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: October 9, 2012
    Assignee: Japan Science and Technology Agency
    Inventors: Sadamichi Maekawa, Taro Yamashita, Saburo Takahashi
  • Publication number: 20120092003
    Abstract: A magnetic-electric energy conversion device includes: a matrix (12) that includes ferromagnetic particles (10) with conductive properties; an injector (20) that injects carriers into the ferromagnetic particles; and a receptor (22) that accepts the carriers from the ferromagnetic particles. In the magnetic-electric energy conversion device, the carriers tunnel from the injector to the receptor via the ferromagnetic particles, when the magnetization state of the ferromagnetic particles is reversed by magnetic tunneling due to a magnetic field.
    Type: Application
    Filed: March 6, 2010
    Publication date: April 19, 2012
    Applicants: TOHOKU UNIVERSITY, THE UNIVERSITY OF TOKYO
    Inventors: Masaaki Tanaka, Pham Nam Hai, Shinobu Ohya, Stewart E. Barnes, Sadamichi Maekawa
  • Patent number: 7755929
    Abstract: First and second tunnel junctions having a common electrode composed of a nonmagnetic conductor and each of which has a counterelectrode composed of a ferromagnet are spaced apart from each other by a distance that is shorter than a spin diffusion length of the nonmagnetic conductor. The first tunnel junction injects spin from the ferromagnet into the nonmagnetic conductor and the second tunnel junction detects, between the ferromagnetic metal and the nonmagnetic conductor, a voltage that accompanies spin injection of the first tunnel junction. The nonmagnetic conductor may be a semiconductor or semimetal that is lower in carrier density than a metal. The common electrode alternatively may be composed of a superconductor. A spin injection device thus provided can exhibit a large signal voltage with a low current and under low magnetic field and can be miniaturized in device size.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: July 13, 2010
    Assignee: Japan Science and Technology Agency
    Inventors: Kouichiro Inomata, Sadamichi Maekawa, Saburo Takahashi
  • Patent number: 7688623
    Abstract: The present invention aims to reduce heat fluctuations of a memory cell and thereby provide a stable writing operation when a magnetization reversal process not involving a reversal magnetic field is used for writing into the memory cell. The magnetic memory cell has a structure where first and second magnetization pinned terminals are connected, with a space therebetween, to one surface of a non-magnetic region, and a magnetization free terminal is connected to the other surface. Magnetization directions of the first and second magnetization pinned terminals are anti-parallel to each other. Writing is performed by controlling a polarity of a current flowing between the first and second magnetization pinned terminals through the non-magnetic region and thus reversing magnetization of the magnetization free terminal.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: March 30, 2010
    Assignees: Hitachi, Ltd., Tohoku University
    Inventors: Sadamichi Maekawa, Saburo Takahashi, Hiroshi Imamura, Masahiko Ichimura, Hiromasa Takahashi
  • Publication number: 20090261319
    Abstract: A Josephson quantum computing device and an integrated circuit using Josephson quantum computing devices which can realize a NOT gate operation controlled with 2 bits will be provided. The Josephson quantum computing device (1) comprises: a superconducting ring member (10) having a ?-junction (6) and a 0-junction (7); and a quantum state detecting member (20) constituted by a superconducting quantum interference device arranged outside of the superconducting ring member, wherein a bonding and an antibonding state brought about by a tunneling effect between a |?> and a |?> state as two states degenerate in energy of the superconducting ring member (10) are regarded as quantum bits. The bonding and antibonding states as the quantum bits are read out by the quantum state detecting member (20). The two bit controlled NOT gate operation can be performed by the two quantum bits comprising said quantum bits.
    Type: Application
    Filed: July 25, 2005
    Publication date: October 22, 2009
    Inventors: Sadamichi Maekawa, Taro Yamashita, Saburo Takahshi
  • Publication number: 20080175044
    Abstract: The present invention aims to reduce heat fluctuations of a memory cell and thereby provide a stable writing operation when a magnetization reversal process not involving a reversal magnetic field is used for writing into the memory cell. The magnetic memory cell has a structure where first and second magnetization pinned terminals are connected, with a space therebetween, to one surface of a non-magnetic region, and a magnetization free terminal is connected to the other surface. Magnetization directions of the first and second magnetization pinned terminals are anti-parallel to each other. Writing is performed by controlling a polarity of a current flowing between the first and second magnetization pinned terminals through the non-magnetic region and thus reversing magnetization of the magnetization free terminal.
    Type: Application
    Filed: January 8, 2008
    Publication date: July 24, 2008
    Inventors: Sadamichi MAEKAWA, Saburo Takahashi, Hiroshi Imamura, Masahiko Ichimura, Hiromasa Takahashi
  • Publication number: 20060022220
    Abstract: A first and a second tunnel junctions (2 and 3) which have a common electrode composed of a nonmagnetic conductor (4) and each of which has a counterelectrode composed of a ferromagnet (6, 8) are disposed spaced apart from each other by a distance that is shorter than a spin diffusion length of the nonmagnetic conductor (4) wherein the first tunnel junction (2) acts to inject spins from the ferromagnet (6) into the nonmagnetic conductor (4) and the second tunnel junction (3) serves to detect, between the ferromagnetic metal (8) and the nonmagnetic conductor (4), a voltage that accompanies spin injection of the first tunnel junction (2) and wherein the nonmagnetic conductor (4) is a nonmagnetic conductor, such as a semiconductor or a semimetal, that is lower in carrier density than a metal. The common electrode alternatively may be composed of a superconductor (4?).
    Type: Application
    Filed: November 20, 2003
    Publication date: February 2, 2006
    Inventors: Kouichiro Inomata, Sadamichi Maekawa, Saburo Takahashi