Abstract: Provided is an optical device including a base wafer containing silicon, a plurality of seed crystals disposed on the base wafer, and a plurality of Group 3-5 compound semiconductors lattice-matching or pseudo lattice-matching the plurality of seed crystals. At least one of the Group 3-5 compound semiconductors has a photoelectric semiconductor formed therein, the photoelectric semiconductor including a light emitting semiconductor that emits light in response to a driving current supplied thereto or a light receiving semiconductor that generates a photocurrent in response to light applied thereto, and at least one of the plurality of Group 3-5 compound semiconductors other than the Group 3-5 compound semiconductor having the photoelectric semiconductor has a heterojunction transistor formed therein.

Abstract: There is provided a semiconductor wafer including a base wafer that has an impurity region in which an impurity atom has been introduced into silicon, a plurality of seed bodies provided in contact with the impurity region, and a plurality of compound semiconductors each provided in contact with the corresponding seed bodies and lattice-matched or pseudo-lattice-matched to the corresponding seed bodies. The semiconductor wafer can further include an inhibitor provided on the base wafer and in which a plurality of apertures exposing at least a part of the impurity region are provided.

Abstract: The present invention provides a light emitting device. The light emitting device has a light distribution in which a light distribution I (?, ?) obtained when light emitted from a chip of the light emitting device is directly measured is not dependent on a direction ? and is substantially represented by I (?, ?)=I (?). I (?, ?) represents a light intensity distribution in a direction (?, ?), ? represents an angle from a direction of a normal to a light extraction surface of the light emitting device (0???90°), ? represents a rotation angle around the normal (0???360°), and I (?) represents a monotone decreasing function with which 0 is approached when ?=90° is satisfied.

Abstract: The semiconductor wafer includes: a base wafer; and an inhibition layer that is disposed on the base wafer as one piece or to be separate portions from each other, and inhibits growth of a crystal of a compound semiconductor, where the inhibition layer has a plurality of first opening regions that have a plurality of openings penetrating the inhibition layer and leading to the base wafer, each of the plurality of first opening regions includes therein a plurality of first openings disposed in the same arrangement, some of the plurality of first openings are first element forming openings each provided with a first compound semiconductor on which an electronic element is to be formed, and the other of the plurality of first openings are first dummy openings in which no electronic element is to be formed.

Abstract: A semiconductor wafer including: a base wafer; a seed crystal disposed on the base wafer; a compound semiconductor disposed above the seed crystal; and a high resistance layer disposed between the seed crystal and the compound semiconductor, the high resistance layer having a larger resistivity than the seed crystal, and the seed crystal lattice matching or pseudo lattice matching the compound semiconductor is provided.

Abstract: A device forming thin film for forming a semiconductor device; an inhibition portion that surrounds the device forming thin film and inhibits growth of a precursor of the device forming thin film into a crystal; a sacrificial growth portion that is formed by causing the precursor to sacrificially grow into a crystal, and is positioned around the device forming thin film separated by the inhibition portion; and a protection film that covers a top portion of the sacrificial growth portion and exposes a top portion of the device forming thin film are included. The protection film may be made of polyimide.

Abstract: A compound semiconductor luminescent device characterized by comprising an electroconductive substrate, a compound semiconductor function layer including a GaN layer, an electrode, an adhesiveness-enhancing layer, and a bonding layer, which are stacked in this order wherein the above-described electroconductive substrate includes a metal material that indicates a thermal expansion coefficient different by 1.5×10?6/° C. or less from GaN.

Abstract: A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; a Ge layer that is crystal-grown on the wafer and shaped as an isolated island; a butler layer that is crystal-grown on the Ge layer and is a group 3-5 compound semiconductor layer containing P; and a functional layer that is crystal-grown on the buffer layer. The Ge layer may be shaped as an island having a size that does not exceed double a distance moved by crystal defects as a result of annealing the Ge layer at a certain temperature for a certain time. The Ge layer may be shaped as an island having a size for which stress due to a difference relative to a thermal expansion coefficient of Si, which is material of the wafer, does not cause crystal defects when the Ge layer is annealed at a certain temperature.

Abstract: A high-quality GaAs-type crystal thin film using an inexpensive Si water with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; an inhibiting layer that is formed on the wafer and that inhibits crystal growth, the inhibiting layer including a covering region that covers a portion of the wafer and an open region that does not cover a portion of the wafer within the covering region; a Ge layer that is crystal-grown in the open region; a buffer layer that is crystal-grown on the Ge layer and is a group 3-5 compound semiconductor layer containing P; and a functional layer that is crystal-grown on the buffer layer. The Ge layer may be formed by annealing with a temperature and duration that enables movement of crystal defects.

Abstract: A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; a Ge layer that is crystal-grown on the wafer and shaped as an isolated island; and a functional layer that is crystal-grown on the Ge layer. The Ge layer may be shaped as an island having a size that docs not exceed double a distance moved by crystal defects as a result of annealing the Ge layer at a certain temperature for a certain time. The Ge layer may be shaped as an island having a size for which stress due to a difference relative to a thermal expansion coefficient of Si, which is material of the wafer, does not cause crystal dejects when the Ge layer is annealed at a certain temperature.

Abstract: A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved.

Abstract: A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; an inhibiting layer that is formed on the wafer and that inhibits crystal growth, the inhibiting layer including a covering region that covers a portion of the wafer and an open region that does not cover a portion of the wafer within the covering region; a Ge layer that is crystal-grown in the open region; and a functional layer that is crystal-grown on the Ge layer. The Ge layer may be formed by annealing with a temperature and duration that enables movement of crystal defects, and the annealing is repeated a plurality of times.

Abstract: The present invention provides a light emitting device. The light emitting device has a light distribution in which a light distribution I (?, ?) obtained when light emitted from a chip of the light emitting device is directly measured is not dependent on a direction ? and is substantially represented by I (?, ?)=I (?). I (?, ?) represents a light intensity distribution in a direction (?, ?), ? represents an angle from a direction of a normal to a light extraction surface of the light emitting device (0???90°), ? represents a rotation angle around the normal (0???360°), and I (?) represents a monotone decreasing function with which 0 is approached when ?=90° is satisfied.

Abstract: The present invention provides a method for producing a group 3-5 nitride semiconductor and a method for producing a light emitting device. The method for producing a group 3-5 nitride semiconductor, comprises the steps of (i), (ii), (iii) and (iv) in this order: (i) placing inorganic particles on a substrate, (ii) growing a semiconductor layer, and (iii) separating the substrate and the semiconductor layer by irradiating the interface between the substrate and the semiconductor layer with light.

Abstract: In order to improve light-emission efficiency without degrading protection performance of a light-emitting layer structure a three p-type layer structure composed of first to third layers is provided in contact with a light-emitting layer structure. The first layer is an n-type AlGaN layer that serves as a protective layer, the third layer is a GaN:Mg layer that serves as a contact layer and the second layer is an AlGaN:Mg layer formed between these layers as an intermediate layer. The provision of the intermediate layer enables an InGaN layer to be thoroughly protected from heat during growth of layers above even if the n-type AlGaN layer is made thin, whereby the GaN:Mg layer can be brought near the light-emitting layer structure to enhance the efficiency of hole injection into the light-emitting layer structure and thus increase the light-emission efficiency.

Abstract: A compound semiconductor luminescent device characterized by comprising: an electroconductive substrate; a compound semiconductor function layer including a GaN layer; an electrode; an adhesiveness-enhancing layer; and a bonding layer, which are stacked in this order, wherein the above-described electroconductive substrate includes a metal material that indicates a thermal expansion coefficient different by 1.5×10?6/° C. or less from GaN.

Abstract: In order to improve light-emission efficiency without degrading protection performance of a light-emitting layer structure a three p-type layer structure composed of first to third layers is provided in contact with a light-emitting layer structure. The first layer is an n-type AlGaN layer that serves as a protective layer, the third layer is a GaN:Mg layer that serves as a contact layer and the second layer is an AlGaN:Mg layer formed between these layers as an intermediate layer. The provision of the intermediate layer enables an InGaN layer to be thoroughly protected from heat during growth of layers above even if the n-type AlGaN layer is made thin, whereby the GaN:Mg layer can be brought near the light-emitting layer structure to enhance the efficiency of hole injection into the light-emitting layer structure and thus increase the light-emission efficiency.

Abstract: In order to improve light-emission efficiency without degrading protection performance of a light-emitting layer structure a three p-type layer structure composed of first to third layers is provided in contact with a light-emitting layer structure. The first layer is an n-type AlGaN layer that serves as a protective layer, the third layer is a GaN:Mg layer that serves as a contact layer and the second layer is an AlGaN:Mg layer formed between these layers as an intermediate layer. The provision of the intermediate layer enables an InGaN layer to be thoroughly protected from heat during growth of layers above even if the n-type AlGaN layer is made thin, whereby the GaN:Mg layer can be brought near the light-emitting layer structure to enhance the efficiency of hole injection into the light-emitting layer structure and thus increase the light-emission efficiency.

Abstract: A diamond semiconductor includes a high-quality thin diamond film layer with few crystal defects and few impurities, implanted with ions of dopant elements and controllable in conductivity determined by a kind and a concentration of the dopant elements. The diamond semiconductor is fabricated by a method including the step of implanting ions of dopant elements into a high-quality thin diamond film layer with few crystal defects and few impurities under conditions that can attain given distribution of concentrations of the dopant elements and with the high-quality thin diamond film layer kept to a temperature in accordance with the conditions so as not to be graphitized, to thereby enable the diamond semiconductor to have conductivity determined by a kind and a concentration of the dopant elements.

Abstract: A diamond pn junction diode includes a p-type diamond thin-film layer formed on a substrate and an n-type diamond thin-film layer formed by forming a high-quality undoped diamond thin-film layer on the p-type diamond thin-film layer and ion-implanting an impurity into the high-quality undoped diamond thin-film layer, or alternatively includes an n-type diamond thin-film layer formed on a substrate and a p-type diamond thin-film layer formed by forming a high-quality undoped diamond thin-film layer on the n-type diamond thin-film layer and ion-implanting an impurity into the high-quality undoped diamond thin-film layer.