Patents by Inventor Sadao Igarashi

Sadao Igarashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120270512
    Abstract: Provided are a transfer gate circuit that has reduced disturbance in an output waveform thereof, a power combining circuit using the transfer gate circuit, and a transmission device and a communication device that use the power combining circuit. The transfer gate circuit includes: output terminals (3, 4); a transistor (5) including a drain connected to the output terminal (3); a transistor (6) including a drain connected to the output terminal (4); transistors (7, 8) each including a drain connected to the output terminal (3) and each including a source connected to a ground potential; and transistors (9, 10) each including a drain connected to the output terminal (4) and each including a source connected to the ground potential.
    Type: Application
    Filed: March 30, 2010
    Publication date: October 25, 2012
    Applicant: KYOCERA CORPORATION
    Inventors: Akira Nagayama, Yasuhiko Fukuoka, Sadao Igarashi, Shinji Isoyama
  • Publication number: 20120149315
    Abstract: Provided is a detector device including: an amplifier (AMP1) for amplifying a voltage of an input electric signal and outputting the amplified electric signal; a first detector circuit (Det1) for outputting a first detection signal having a current corresponding to the voltage of the input electric signal; a second detector circuit (Det2) for outputting a second detection signal having a current corresponding to the voltage of the input electric signal; and a current summing circuit (SUM1) to which the first detection signal and the second detection signal are input, for outputting a third detection signal having a current value obtained by summing current values of the first detection signal and the second detection signal, in which an input signal to be detected is divided into two, one of the divided signals being input to the first detector circuit (Det1) and the other of the divided signals being input via the amplifier (AMP1) to the second detector circuit (Det2).
    Type: Application
    Filed: August 25, 2010
    Publication date: June 14, 2012
    Applicant: KYOCERA CORPORATION
    Inventors: Akira Nagayama, Yasuhiko Fukuoka, Sadao Igarashi
  • Patent number: 7369067
    Abstract: In an optical coupled isolation circuit, a PWM encoder encodes a one-bit binary data signal supplied from a sigma-delta analog-digital converter in synchronization with a clock signal of a cycle T to produce a pulse width modulation signal. The pulse width modulation signal includes a narrower pulse having a width of 1/T and a wider pulse having a width of 3/T according to binary codes “0” and “1”. The pulse width modulation signal is transmitted to a decoder as a recovered pulse width modulation signal through a light emitting device, a light detector and an optical recovery circuit. A decoder decodes the recovered pulse width modulation signal at timing of a half of the clock cycle from each rising edge of the recovered pulse width modulation signal. The rising edge is synchronized with the clock signal. Thus, the clock signal and the data signal can be transmitted in one channel.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: May 6, 2008
    Assignee: NEC Electronics Corporation
    Inventors: Motoharu Kishi, Atsushi Iwata, Yoshitaka Murasaka, Toshifumi Imamura, Sadao Igarashi, Kouichi Kobinata
  • Publication number: 20060279438
    Abstract: In an optical coupled isolation circuit, a PWM encoder encodes a one-bit binary data signal supplied from a sigma-delta analog-digital converter in synchronization with a clock signal of a cycle T to produce a pulse width modulation signal. The pulse width modulation signal includes a narrower pulse having a width of 1/T and a wider pulse having a width of 3/T according to binary codes “0” and “1”. The pulse width modulation signal is transmitted to a decoder as a recovered pulse width modulation signal through a light emitting device, a light detector and an optical recovery circuit. A decoder decodes the recovered pulse width modulation signal at timing of a half of the clock cycle from each rising edge of the recovered pulse width modulation signal. The rising edge is synchronized with the clock signal. Thus, the clock signal and the data signal can be transmitted in one channel.
    Type: Application
    Filed: April 14, 2006
    Publication date: December 14, 2006
    Applicant: NEC Electronics Corporation
    Inventors: Motoharu Kishi, Atsushi Iwata, Yoshitaka Murasaka, Toshifumi Imamura, Sadao Igarashi, Kouichi Kobinata
  • Patent number: 6980776
    Abstract: The present invention provides a transceiver apparatus that permits miniaturization even when the antenna thereof is an unbalanced circuit and the transmitter circuit section and receiver circuit section thereof are balanced circuits. The transceiver apparatus is constituted comprising: a semiconductor integrated circuit device that mounts on the same semiconductor chip a balanced receiver circuit 41 for receiving a received signal as a differential input and balanced transmitter circuit 52 for outputting a transmitted signal as a differential output, and that has at least two terminals 71,72 connected to connecting nodes that connect the balanced receiver circuit 41 and the balanced transmitter circuit 52; first and second capacitors C2,C3 connected to the terminals 71, 72 respectively; an external inductor L1 connected to the first and second capacitors C2, C3; a band pass filter 2 and an antenna 1 coupled to the first capacitor C2; and a third capacitor C1 connected to the second capacitor C3.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: December 27, 2005
    Assignees: Rohm Co., Ltd, RF Chips Technology Inc.
    Inventors: Yoshikazu Shimada, Hiroyuki Ashida, Katsuya Ogura, Sadao Igarashi
  • Publication number: 20030124987
    Abstract: The present invention provides a transceiver apparatus that permits miniaturization even when the antenna thereof is an unbalanced circuit and the transmitter circuit section and receiver circuit section thereof are balanced circuits.
    Type: Application
    Filed: December 4, 2002
    Publication date: July 3, 2003
    Applicant: ROHM CO., LTD.
    Inventors: Yoshikazu Shimada, Hiroyuki Ashida, Katsuya Ogura, Sadao Igarashi
  • Patent number: 6351504
    Abstract: A reception signal has a performance in which a disturbance signal level exceeds a reference line in IS-95 and in which a C/N of the whole of a reception signal level is satisfactory.
    Type: Grant
    Filed: December 14, 1998
    Date of Patent: February 26, 2002
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Syuichi Tsuda
  • Patent number: 6236848
    Abstract: A receive integrated circuit for a mobile telephone comprising a variable gain amplifier for amplifying a received signal with a variable gain, a low-pass filter for attenuating harmonic components of the signal amplifier by the variable gain amplifier, and a QPSK demodulator for demodulating by quadri-phase shift keying the signal having passed through the low-pass filter, wherein signal lines interconnecting the variable gain amplifier, the low-pass filter and the quadri-phase shift keying demodulator are balanced.
    Type: Grant
    Filed: March 13, 1997
    Date of Patent: May 22, 2001
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki
  • Patent number: 5926749
    Abstract: An amplifier circuit comprises current-variable mode variable amplifying circuits and for amplifying an IF signal and a current-constant mode variable amplifying circuit for amplifying an RF signal. I and Q signals are applied to the IF-stage variable amplifying circuits and corresponding to two stages through a QPSK modulating circuit and amplified based on an AGC voltage VAGC applied thereto. The IF signal is converted into the RF signal by a mixer, which in turn is applied to the RF-stage variable amplifying circuit where it is amplified based on the AGC voltage VAGC common to the IF stages. The linearly-varied AGC voltage VAGC is converted into an exponentially-varied control current by transistors. Thus, a gain PG ?dB! of each of variable amplifying circuits is controlled linearly with the AGC voltage VAGC.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: July 20, 1999
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki, Satoshi Urabe
  • Patent number: 5900782
    Abstract: An object of the present invention is to provide an AGC voltage correction circuit unaffected by a change in temperature.Since base-emitter voltages V.sub.BE of transistors Q9 and Q10 constituting a first reference current source 7 have temperature dependency, the variations of the gains of amplification transistors Q17 and Q18 dependent on temperature are diminished. Since transistors Q1 and Q2 constituting a second reference current source 2 have temperature dependency, a gain slope concerning amplification transistors Q17 and Q18 relative to temperature is corrected linearly.
    Type: Grant
    Filed: April 16, 1997
    Date of Patent: May 4, 1999
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki, Satoshi Urabe
  • Patent number: 5900781
    Abstract: A multistage amplifier circuit comprises a current constant mode variable amplifying circuit for amplifying an input signal and current variable mode variable amplifying circuits and for further amplifying the signal amplified by the first variable amplifying circuit. An AGC voltage VAGC is commonly applied between the bases and emitters of an amplification degree control transistor of the current constant mode variable amplifying circuit and amplification degree control transistors of the current variable mode amplifying circuits. Collector currents of the transistors change exponentially with respect to the linearly-varied AGC voltage VAGC. Further, currents each proportional to the collector current of the transistor flow in the transistors. Thus, the gain PG ?dB! of the current constant mode variable amplifying circuit changes linearly with the AGC voltage VAGC.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: May 4, 1999
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki, Satoshi Urabe
  • Patent number: 5532650
    Abstract: A high-frequency amplifier has a first signal amplifier which includes a field effect transistor, and a constant-current circuit which is direct current connected, as well as cascade-connected, to the field effect transistor for maintaining a constant drain current of the field effect transistor. This constant-current circuit also acts as a second amplifier. The constant-current circuit may comprise a bipolar transistor or temperature compensation circuit. In this high-frequency amplifier, its gain and noise figure are stable against ambient temperature changes and power consumption efficiency is improved. This high-frequency amplifier is also suitable for mass production.
    Type: Grant
    Filed: January 19, 1995
    Date of Patent: July 2, 1996
    Assignee: Alps Electric Co., Ltd.
    Inventor: Sadao Igarashi
  • Patent number: 5418500
    Abstract: A high-frequency oscillator circuit designed to efficiently output fundamental and second harmonic waves. A second harmonic resonance circuit is inserted between bases of a pair of transistors having collectors connected to each other. Each of a pair of capacitors is inserted between the base and an emitter of the corresponding one of the pair of transistors, and each of another pair of capacitors is inserted between the emitters of the transistors. Further, a pair of fundamental wave output terminals for outputting fundamental waves are respectively connected to the bases of the transistors, and a pair of second harmonic output terminals for outputting second harmonic waves are respectively connected to a connection between the second pair of capacitors and a connection point between the collectors of the pair of transistors.
    Type: Grant
    Filed: March 16, 1993
    Date of Patent: May 23, 1995
    Assignee: Alps Electric Co., Ltd.
    Inventor: Sadao Igarashi
  • Patent number: 5329189
    Abstract: A mixer circuit which is improved in distortion characteristic and band characteristic and can assure impedance matching with another circuit at a preceding stage readily and besides can prevent abnormal oscillations. The mixer circuit comprises a differential amplifier constituted from a pair of transistors grounded at the emitters thereof, and a double balanced mixer constituted from first and second pairs of transistors. A first impedance element is interposed between a junction between the emitters of the first pair of transistors of the double balanced mixer and the collector of one of the pair of transistors of the differential amplifier, and a second impedance element is interposed between a junction between the emitters of the second pair of transistors of the double balanced mixer and the collector of the other of the pair of transistors of the differential amplifier.
    Type: Grant
    Filed: July 17, 1992
    Date of Patent: July 12, 1994
    Assignee: Alps Electric Co., Ltd.
    Inventors: Susumu Ushida, Sadao Igarashi
  • Patent number: 5327097
    Abstract: There is provided a gain control circuit which comprises a circuit unit composed of a transistor Q.sub.11, a first gain control unit 12 including transistors Q.sub.12 and Q.sub.13 having emitters connected to each other and a choke coil L.sub.1 having an end connected to the collector of the transistor Q.sub.12 and the other end connected to the collector of the transistor Q.sub.13 for checking a high frequency signal current, and a second gain control unit 15 including transistors Q.sub.14 and Q.sub.15 having emitters connected to each other. Then, the transistor Q.sub.11 of the circuit unit is connected to the node where the emitters of the first gain control unit 12 are connected to each other and the node where the transistor Q.sub.13 of the first gain control unit 12 is connected to the choke coil L.sub.1 is connected to the node where the emitters of the second gain control unit 15 are connected to each other, and a high frequency is input to the base of the transistor Q.sub.11 of the circuit unit.
    Type: Grant
    Filed: January 19, 1993
    Date of Patent: July 5, 1994
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki
  • Patent number: 5115317
    Abstract: A tuning apparatus is disclosed in which a television signal of either the UHF band or the VHF band is subjected to frequency conversion to obtain an intermediate frequency and, thereby, the television signal for a desired channel is selected. The tuning apparatus allows either the television signal of the UHF band or the television signal of the VHF band to be converted to an intermediate frequency by means of a common mixer. The mixer is constituted of a balanced mixer of a two-pair differential type. The tuning apparatus includes a local oscillator for reception of the UHF band and a local oscillator for reception of the VHF band. The intermediate frequency stage as the output of the mixer is provided with an attenuator of which the degree of attenuation when the UHF band is received and that when the VHF band is received are different and, thereby, the gains of the apparatus as a whole are equal when receiving the UHF band and when receiving the VHF band.
    Type: Grant
    Filed: December 17, 1990
    Date of Patent: May 19, 1992
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Susumu Ushida
  • Patent number: 5057788
    Abstract: A two-stage differential amplifier connected in cascade according to the present invention is suitable for fabrication within an integrated circuit, in which a constant current source circuit is connected with the common emitters of the transistors in the preceding stage differential amplifier, and the emitters of the transistors in the succeeding stage differential amplifier are connected with the collectors of these transistors through impedance elements. Current consumption in the overall amplifier is reduced and heat production therein is suppressed. Furthermore, since a capacitor is connected between the collector of each of the transistors in the preceding stage differential amplifier and the base of each of the transistors in the succeeding stage differential amplifier, it is possible to match easily the input and the output impedances in the succeeding and preceding amplifier by means of this capacitor and the impedance elements described above.
    Type: Grant
    Filed: August 28, 1990
    Date of Patent: October 15, 1991
    Assignee: Alps Electric Co., Ltd.
    Inventors: Susumu Ushida, Sadao Igarashi
  • Patent number: 4983976
    Abstract: A data transmission system includes a data carrier which has a memory for storing therein data including an identification code and which is attached to an object and a main apparatus having a microwave oscillator so as to conduct communications with the data carrier by use of a microwave, thereby writing data in or reading data from the memory of the data carrier.The main apparatus transmits a microwave modulated by a command or data and thereafter transmits a nonmodulated carrier for a predetermined period of time. On receiving a command, the data carrier executes a read/write operation on the memory and then generates a response. The data carrier receives the nonmodulated carrier sent from the main apparatus so as to conduct a modulation of quadrature phase-shift keying thereon by use of response data, thereby reflectively transmitting the modulated carrier with a plane of polarization shifted from a plane of polarization of the received wave by 90.degree..
    Type: Grant
    Filed: June 12, 1989
    Date of Patent: January 8, 1991
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Akimitsu Ogata, Hisato Fujisaka, Sadao Igarashi, Toshimitsu Nozu, Katsura Onozato, Masanobu Hirose, Katsuji Miwa
  • Patent number: 4799033
    Abstract: A microwave separator for separating a microwave signal to those having frequencies included in two frequency bands by means of a first band pass filter intended for the low frequency band and a second filter intended for the high frequency band, characterized in that said first band pass filter is of the comb line type and that said second band pass filter is of the coaxial type in which plural coaxial type resonators are connected one another in series through capacitors. As the result, microwave signals can be reliably separated at two adjacent frequency bands without any signal loss and the return losses of the band pass filters can be improved accordingly.
    Type: Grant
    Filed: March 19, 1987
    Date of Patent: January 17, 1989
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Moriaki Ueno
  • Patent number: 4761624
    Abstract: A microwave band pass filter comprises a band pass filter of the coaxial type which is formed by connecting plural coaxial type resonators in series through capacitors, and another band pass filter of the comb line type connected in series to the coaxial type band pass filter, wherein lower cutoff frequencies for the coaxial type band pass filter are included in a pass band for the comb line type band pass filter while higher cutoff frequencies for the comb line type band pass filter are included in a pass band for the coaxial type band pass filter, so that the skirting characteristic can be made sharp at high and low bands even with fewer resonator stages.
    Type: Grant
    Filed: March 20, 1987
    Date of Patent: August 2, 1988
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Moriaki Ueno