Patents by Inventor Sadayoshi Arakawa

Sadayoshi Arakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5994212
    Abstract: A semiconductor chip is bonded onto a die pad portion of a lead frame including nickel/palladium/gold stacked plate layers. Then, a first bonding procedure is carried out with a metal wire of gold pressed against an electrode pad of the semiconductor chip while applying a load of approximately 60 g and ultrasonic waves with a power of approximately 55 mW by using a bonding tool. Subsequently, a second bonding procedure is carried out with the metal wire pressed against an inner lead portion of the lead frame while applying a load of 150 through 250 g and the ultrasonic waves with a power of 0 through 20 mW. In the second bonding procedure, the wire bonding in conformity with the property of the stacked plate layers can be conducted using a large load and a small ultrasonic power, resulting in attaining firm bonding in a short period of time without causing peeling of the gold plate layer.
    Type: Grant
    Filed: July 14, 1997
    Date of Patent: November 30, 1999
    Assignee: Matsushita Electronics Corporation
    Inventors: Sadayoshi Arakawa, Seiichi Ito, Kenichi Nishiyama, Koei Maruyama