Patents by Inventor Sadayoshi Umeda

Sadayoshi Umeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8937569
    Abstract: An analog-to-digital conversion device has: an analog-to-digital converter configured to receive an input signal via an input signal node, and convert the input signal to a digital signal; and a control circuit configured to receive the digital signal when the input signal is set to have a fixed value, and change, when a deviation amount of the digital signal with the respect to an expected value is equal to or larger than a threshold value, a value of a capacitor between a power supply potential node and a reference potential node of the analog-to-digital converter and/or values of resistors connected to the power supply potential node and the reference potential node of the analog-to-digital converter.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: January 20, 2015
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Yasuhiro Mizuno, Sadayoshi Umeda, Zongyang Xue, Tomoharu Watanabe
  • Publication number: 20060072260
    Abstract: An electrostatic protection circuit having an external power supply terminal, an external ground terminal, a first external signal terminal, a first p-type field-effect transistor having a source and a drain respectively connected to the external power supply terminal and the first external signal terminal, a first n-type field-effect transistor having a source and a drain respectively connected to the external ground terminal and the first external signal terminal, and an electrostatic detection circuit is provided. The electrostatic detection circuit turns off the first p-type field-effect transistor and the first n-type field-effect transistor when it does not detect static electricity, and the electrostatic detection circuit turns on the first p-type field-effect transistor and the first n-type field-effect transistor when it detects static electricity.
    Type: Application
    Filed: December 30, 2004
    Publication date: April 6, 2006
    Inventors: Masahito Arakawa, Sadayoshi Umeda
  • Publication number: 20040070901
    Abstract: There provided an electrostatic discharge protection circuit for preventing a damage to a transistor due to an ESD surge. In the protection circuit, a first and a second signal line serving as a source or a drain of a transistor Tr1 are connected to a first and a second power source terminal, respectively. A first diode has an anode connected to the first signal line and a cathode connected to a back gate of the transistor and a cathode of a second diode. The second diode has an anode connected to the second signal line 2. Thus, the source and drain of the transistor Tr1 are switched to each other in accordance with an ESD surge voltage generated in the first and the second signal line. Therefore, an ESD surge current runs through a source-drain path without producing a parasitic action in a well tap of the source and the drain, thereby preventing a damage to the transistor Tr1.
    Type: Application
    Filed: August 19, 2003
    Publication date: April 15, 2004
    Inventor: Sadayoshi Umeda