Abstract: There is provided a data processing circuit for processing symbol data read from a disc of a digital audio system such as a DAD player. Each of the symbol data read from the disc is first stored into a buffer register and then transferred therefrom to a symbol memory in accordance with internal pulse signals, and the number of the pulse signals generated during a period required to process one frame of symbol data is greater than that of symbol data contained in one frame of symbol data. An address data for addressing a desired area of the symbol memory is formed by adding a reference address data generated by counting the internal frame synchronization signals to a relative address data generated by adding together a specific pair of addressing data read out from an address memory, the address memory storing a plurality of groups of addressing data to be used in accordance with each mode of operation of this circuit.

Abstract: In a digital system, there is provided a circuit for detecting and correcting errors in a group of data using Reed-Solomon codes. The group of data is first stored in a memory, and syndromes of the data are produced by a syndrome calculation circuit and fed to an internal data bus. A first data conversion circuit converts the syndromes on the internal data bus into logarithmic values and a multiplier-divider circuit executes multiplication or division of the data on the internal data bus by addition and subtraction operations of the logarithmic values. A second data conversion circuit converts antilogarithmically data from the multiplier-divider circuit, and an addition and subtraction circuit executes addition or subtraction of the data from the second data conversion circuit.