Patents by Inventor Sadayuki Ohyama

Sadayuki Ohyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10581760
    Abstract: A relay apparatus includes first and second board modules and a bridge module. The first board module is configured to relay the communications among the plurality of electronic devices, the plurality of electronic devices being connected to the first board module. The second board module is configured to relay the communications among the plurality of electronic devices, the plurality of electronic devices being connected to the second board module. The bridge module is configured to communicatively connect the first board module and the second board module.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: March 3, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Kenji Aoki, Shinnosuke Matsuda, Katsuya Niigata, Sadayuki Ohyama
  • Publication number: 20160323206
    Abstract: A relay apparatus includes first and second board modules and a bridge module. The first board module is configured to relay the communications among the plurality of electronic devices, the plurality of electronic devices being connected to the first board module. The second board module is configured to relay the communications among the plurality of electronic devices, the plurality of electronic devices being connected to the second board module. The bridge module is configured to communicatively connect the first board module and the second board module.
    Type: Application
    Filed: March 31, 2016
    Publication date: November 3, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Kenji AOKI, Shinnosuke MATSUDA, Katsuya NIIGATA, Sadayuki OHYAMA
  • Patent number: 8838918
    Abstract: An information processing apparatus includes a battery for providing the interior of the information processing apparatus with power; a volatile memory for storing data; a nonvolatile memory for backupping the data stored in the volatile memory; a controller for controlling backup of the data in accordance with a process comprising the steps of: saving the data into the nonvolatile memory; upon recovery of the power from the external power source, writing back the data into the volatile memory; and deleting the data saved in the nonvolatile memory; wherein when the power from an external power source to the information processing apparatus is stopped during deleting data in the nonvolatile memory, the controller selectively writes back deleted data from the volatile memory into the nonvolatile memory.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: September 16, 2014
    Assignee: Fujitsu Limited
    Inventors: Sadayuki Ohyama, Takanori Ishii, Shinnosuke Matsuda
  • Publication number: 20140156934
    Abstract: A storage apparatus includes controller modules configured to have a cache memory and to control a storage device, respectively, and communication channels that connect the controller modules in a mesh topology, where one controller module providing an instruction to perform data transfer in which the controller module is specified as a transfer source and another controller module is specified as a transfer destination. The instruction is provided to a controller module directly connected to the other controller modules using a corresponding one of the communication channels, and configured to perform data transfer from the cache memory of the one controller module to the cache memory of the other controller module, in accordance with the instruction.
    Type: Application
    Filed: September 19, 2013
    Publication date: June 5, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Sadayuki Ohyama
  • Patent number: 8448047
    Abstract: A storage device is for restoring the data saved in a nonvolatile memory to a cache memory, even if there is not a read response from the nonvolatile memory. In a data saving operation, parity data of to-be-saved data is generated, and the to-be-saved data and the parity data having CRCs and AIDs added thereto are written into a flash memory. In a data restoring operation, if an operation to read data from the flash memory is not completed within a predetermined period of time, the data reading operation is suspended, and additional data is set. The to-be-saved data having a data error corrected with the parity data is then written into the cache memory.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: May 21, 2013
    Assignee: Fujitsu Limited
    Inventors: Nina Tsukamoto, Sadayuki Ohyama, Yuji Hanaoka
  • Patent number: 8286028
    Abstract: A backup method makes a backup of cache data to a nonvolatile memory by using a controller, the cache data being stored in the volatile memory. The backup method includes writing the cache data stored in the volatility memory in a selected area of the nonvolatile memory, generating party data by operating the parity operations between each of the predetermined parts of the cache data in the volatile memory, verifying whether an error found in the part of the cache data in the nonvolatile memory can be recovered by using the parity data, and rewriting the part of the cache data when the error found in the part of the cache data in the nonvolatile memory cannot be recovered by using the parity data in an area of the nonvolatile memory different from the selected area.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: October 9, 2012
    Assignee: Fujitsu Limited
    Inventors: Shinnosuke Matsuda, Sadayuki Ohyama, Kentaro Yuasa, Takanori Ishii, Yoko Kawano, Yuji Hanaoka, Nina Tsukamoto, Tomoharu Muro
  • Patent number: 8234389
    Abstract: A communication control method is provided for an encryption processing unit connected to a connection status acquiring unit which is connected to a circuit that transmits packets on a network and acquires the status of a connection to a network for an encrypting device for encrypting the packet, and connected to an expansion card for connecting to the network, based on the network connection status requested and acquired from the connection status acquiring unit by the expansion card each prescribed period of time, by relaying and acquiring the network connection status from the connection status acquiring unit and forcibly notifying the expansion card that the connection status is connected and/or not connected, according to a requirement/criteria.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: July 31, 2012
    Assignee: Fujitsu Limited
    Inventors: Osamu Kezuka, Kazuho Kitazawa, Yasuo Ishiwata, Masaru Sakurai, Sadayuki Ohyama
  • Patent number: 7895375
    Abstract: A Direct Memory Access (DMA) controller issues a read request to read data stored in a cache memory and sends a cache controller the read request via a bridge chip. When a response time monitored by a response time monitor exceeds a predetermined time, a status information notification unit obtains a measured value of a throughput from a throughput measuring unit and sends the cache controller a notification of both delay in the response time and the status information of a bus. A suppression instruction counting unit counts the number of suppression instructions, issued from the cache controller, to suppress a read request and sends a suppression control unit a notification of the number of suppression instructions. Then, the suppression control unit indicates a waiting time corresponding to the number of suppression instructions to the DMA controller to perform control to suppress issuance of a read request.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: February 22, 2011
    Assignee: Fujitsu Limited
    Inventors: Nina Tsukamoto, Sadayuki Ohyama
  • Patent number: 7895476
    Abstract: In a data relay device, it is judged whether a destination address of data received from an adapter matches with an address specified for an interruption process. Only data that is judged appropriate is sent to a controller.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: February 22, 2011
    Assignee: Fujitsu Limited
    Inventors: Nina Arataki, Sadayuki Ohyama
  • Patent number: 7873880
    Abstract: A data relay device relays a read request from a source device to a destination device and relays data corresponding to the read request from the destination device to the source device. The data relay device monitors elapsed time from a time point at which a read request is relayed to the destination device. When the elapsed time reaches warning time or error time, the data relay device sends a warning message or an error message to the source device.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: January 18, 2011
    Assignee: Fujitsu Limited
    Inventors: Nina Arataki, Sadayuki Ohyama
  • Publication number: 20110010582
    Abstract: A storage system has a first power supply unit, a second power supply unit for supplying electronic power to the storage system when the first power supply unit is not supplying electronic power to the storage system, a storage for storing data, a first memory for storing data, a control unit for reading out data stored in the storage and writing the data into the first memory, and reading out data stored in the first memory and writing the data into the storage, a second memory for storing cache data, a table indicating whether each of the data stored in the first memory is to be evacuated to the second memory or not, respectively, and an evacuating unit for evacuating the data stored in the first memory to the second memory in reference to the table when the second power supply unit is supplying electronic power to the storage system.
    Type: Application
    Filed: June 24, 2010
    Publication date: January 13, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Nina TSUKAMOTO, Sadayuki OHYAMA
  • Publication number: 20100325522
    Abstract: A storage device is for restoring the data saved in a nonvolatile memory to a cache memory, even if there is not a read response from the nonvolatile memory. In a data saving operation, parity data of to-be-saved data is generated, and the to-be-saved data and the parity data having CRCs and AIDs added thereto are written into a flash memory. In a data restoring operation, if an operation to read data from the flash memory is not completed within a predetermined period of time, the data reading operation is suspended, and additional data is set. The to-be-saved data having a data error corrected with the parity data is then written into the cache memory.
    Type: Application
    Filed: August 27, 2010
    Publication date: December 23, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Nina Tsukamoto, Sadayuki Ohyama, Yuji Hanaoka
  • Publication number: 20100318844
    Abstract: A backup method makes a backup of cache data to a nonvolatile memory by using a controller, the cache data being stored in the volatile memory. The backup method includes writing the cache data stored in the volatility memory in a selected area of the nonvolatile memory, generating party data by operating the parity operations between each of the predetermined parts of the cache data in the volatile memory, verifying whether an error found in the part of the cache data in the nonvolatile memory can be recovered by using the parity data, and rewriting the part of the cache data when the error found in the part of the cache data in the nonvolatile memory cannot be recovered by using the parity data in an area of the nonvolatile memory different from the selected area.
    Type: Application
    Filed: August 3, 2010
    Publication date: December 16, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Shinnosuke MATSUDA, Sadayuki OHYAMA, Kentaro YUASA, Takanori ISHII, Yoko KAWANO, Yuji HANAOKA, Nina TSUKAMOTO, Tomoharu MURO
  • Publication number: 20090198931
    Abstract: An information processing apparatus includes a battery for providing the interior of the information processing apparatus with power; a volatile memory for storing data; a nonvolatile memory for backupping the data stored in the volatile memory; a controller for controlling backup of the data in accordance with a process comprising the steps of: saving the data into the nonvolatile memory; upon recovery of the power from the external power source, writing back the data into the volatile memory; and deleting the data saved in the nonvolatile memory; wherein when the power from an external power source to the information processing apparatus is stopped during deleting data in the nonvolatile memory, the controller selectively writes back deleted data from the volatile memory into the nonvolatile memory.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 6, 2009
    Applicant: Fujitsu Limited
    Inventors: Sadayuki Ohyama, Takanori Ishii, Shinnosuke Matsuda
  • Patent number: 7480850
    Abstract: A method of writing data includes receiving a record of a variable-length data format, creating a field-checking code for each field of the record received, creating a block-checking code in units of the fixed-length data for the data received, and writing data by reading the record, assembling fixed length data that includes the field-checking code and the block-checking code by using the field-checking code and the block-checking code, and transferring the data to a cache memory.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: January 20, 2009
    Assignee: Fujitsu Limited
    Inventors: Nina Arataki, Sadayuki Ohyama
  • Patent number: 7430634
    Abstract: A data transfer apparatus receives comparison data to be compared with stored data from an external unit, searches data corresponding to the comparison data from among the stored data, and transfers the searched data to the external unit. A control unit generates comparison-condition information for searching predetermined stored data from a data storing memory. A comparison-data storing unit stores the received comparison data. A comparison-condition storing unit stores the generated comparison-condition information. A transfer processing unit transfers the searched stored-data to the external unit.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: September 30, 2008
    Assignee: Fujitsu Limited
    Inventors: Shinnosuke Matsuda, Nina Arataki, Sadayuki Ohyama
  • Publication number: 20080215724
    Abstract: A communication control method is provided for an encryption processing unit connected to a connection status acquiring unit which is connected to a circuit that transmits packets on a network and acquires the status of a connection to a network for an encrypting device for encrypting the packet, and connected to an expansion card for connecting to the network, based on the network connection status requested and acquired from the connection status acquiring unit by the expansion card each prescribed period of time, by relaying and acquiring the network connection status from the connection status acquiring unit and forcibly notifying the expansion card that the connection status is connected and/or not connected, according to a requirement/criteria.
    Type: Application
    Filed: February 6, 2008
    Publication date: September 4, 2008
    Applicant: Fujitsu Limited
    Inventors: Osamu KEZUKA, Kazuho Kitazawa, Yasuo Ishiwata, Masaru Sakurai, Sadayuki Ohyama
  • Publication number: 20080195831
    Abstract: A Direct Memory Access (DMA) controller issues a read request to read data stored in a cache memory and sends a cache controller the read request via a bridge chip. When a response time monitored by a response time monitor exceeds a predetermined time, a status information notification unit obtains a measured value of a throughput from a throughput measuring unit and sends the cache controller a notification of both delay in the response time and the status information of a bus. A suppression instruction counting unit counts the number of suppression instructions, issued from the cache controller, to suppress a read request and sends a suppression control unit a notification of the number of suppression instructions. Then, the suppression control unit indicates a waiting time corresponding to the number of suppression instructions to the DMA controller to perform control to suppress issuance of a read request.
    Type: Application
    Filed: November 13, 2007
    Publication date: August 14, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Nina TSUKAMOTO, Sadayuki OHYAMA
  • Publication number: 20080184080
    Abstract: In a data relay device, it is judged whether a destination address of data received from an adapter matches with an address specified for an interruption process. Only data that is judged appropriate is sent to a controller.
    Type: Application
    Filed: September 24, 2007
    Publication date: July 31, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Nina Arataki, Sadayuki Ohyama
  • Publication number: 20080155358
    Abstract: A data relay device relays a read request from a source device to a destination device and relays data corresponding to the read request from the destination device to the source device. The data relay device monitors elapsed time from a time point at which a read request is relayed to the destination device. When the elapsed time reaches warning time or error time, the data relay device sends a warning message or an error message to the source device.
    Type: Application
    Filed: October 18, 2007
    Publication date: June 26, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Nina Arataki, Sadayuki Ohyama