Patents by Inventor Sadia Naseem
Sadia Naseem has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240047226Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.Type: ApplicationFiled: October 17, 2023Publication date: February 8, 2024Inventors: Sadia Naseem, Vikas Gupta
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Publication number: 20230395969Abstract: A high frequency wireless device includes a three-dimensional (3D) antenna structure mounted on a PCB including a first antenna connected to a first waveguide feed and second antenna connected to a second waveguide feed. A packaged device on the PCB has a top metal surface including a transmit (Tx) radiating structure under the second waveguide feed and a receive (Rx) radiating structure under the first waveguide feed, and an RF connection from the top metal surface to its bottom surface. An IC die is flipchip attached to the bottom surface including at least one Rx channel and at least one Tx channel connected by the RF connection to the Rx and Tx radiating structures. Protruding metal features are on the dielectric layer under the first and second waveguide feeds on ?2 sides of the Tx and the Rx radiating structure to create a waveguiding wall structure for directing signals.Type: ApplicationFiled: August 22, 2023Publication date: December 7, 2023Inventors: VIKAS GUPTA, MEYSAM MOALLEM, SADIA NASEEM
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Patent number: 11791168Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.Type: GrantFiled: February 9, 2021Date of Patent: October 17, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sadia Naseem, Vikas Gupta
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Patent number: 11735806Abstract: A high frequency wireless device includes a three-dimensional (3D) antenna structure mounted on a PCB including a first antenna connected to a first waveguide feed and second antenna connected to a second waveguide feed. A packaged device on the PCB has a top metal surface including a transmit (Tx) radiating structure under the second waveguide feed and a receive (Rx) radiating structure under the first waveguide feed, and an RF connection from the top metal surface to its bottom surface. An IC die is flipchip attached to the bottom surface including at least one Rx channel and at least one Tx channel connected by the RF connection to the Rx and Tx radiating structures. Protruding metal features are on the dielectric layer under the first and second waveguide feeds on ?2 sides of the Tx and the Rx radiating structure to create a waveguiding wall structure for directing signals.Type: GrantFiled: October 4, 2018Date of Patent: August 22, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Vikas Gupta, Meysam Moallem, Sadia Naseem
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Patent number: 11677152Abstract: An antenna apparatus in a packaged electronic device includes: an antenna assembly with a conductive antenna, and an insulator; a conductive feed line extending on or in a substrate; a conductive layer with an aperture on or in the substrate between the conductive feed line and an exposed portion of the conductive antenna; and a support structure mounted to a portion of the substrate and to a portion of the antenna assembly to support the antenna assembly and to provide an air gap between the exposed portion of the conductive antenna and the aperture.Type: GrantFiled: March 3, 2021Date of Patent: June 13, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Vikas Gupta, Sadia Naseem, Meysam Moallem
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Patent number: 11676930Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.Type: GrantFiled: May 7, 2021Date of Patent: June 13, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Benjamin Stassen Cook, Daniel Lee Revier, Sadia Naseem, Mahmud Halim Chowdhury
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Publication number: 20220285844Abstract: An antenna apparatus in a packaged electronic device includes: an antenna assembly with a conductive antenna, and an insulator; a conductive feed line extending on or in a substrate; a conductive layer with an aperture on or in the substrate between the conductive feed line and an exposed portion of the conductive antenna; and a support structure mounted to a portion of the substrate and to a portion of the antenna assembly to support the antenna assembly and to provide an air gap between the exposed portion of the conductive antenna and the aperture.Type: ApplicationFiled: March 3, 2021Publication date: September 8, 2022Inventors: Vikas Gupta, Sadia Naseem, Meysam Moallem
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Publication number: 20210265299Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.Type: ApplicationFiled: May 7, 2021Publication date: August 26, 2021Inventors: Benjamin Stassen Cook, Daniel Lee Revier, Sadia Naseem, Mahmud Halim Chowdhury
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Patent number: 11031364Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.Type: GrantFiled: March 7, 2018Date of Patent: June 8, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Benjamin Stassen Cook, Daniel Lee Revier, Sadia Naseem, Mahmud Halim Chowdhury
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Publication number: 20210166951Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.Type: ApplicationFiled: February 9, 2021Publication date: June 3, 2021Inventors: Sadia Naseem, Vikas Gupta
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Patent number: 10916448Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.Type: GrantFiled: July 5, 2018Date of Patent: February 9, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sadia Naseem, Vikas Gupta
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Publication number: 20200212536Abstract: In a described example, a wireless communication device includes an antenna substrate having an antenna on an antenna side surface; a semiconductor die on an device side surface of the antenna substrate, opposite the antenna side surface; and an antenna protection layer covering the antenna and a portion of the antenna side surface of the antenna substrate having a uniform predetermined thickness across the antenna side surface of the antenna substrate within +/?10%.Type: ApplicationFiled: May 7, 2019Publication date: July 2, 2020Inventors: Vikas Gupta, Sadia Naseem, Meysam Moallem
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Patent number: 10559524Abstract: A packaged semiconductor device includes a leadframe (LF) having a plurality of laminate-supporting pedestals. A cured first die attach (DA) material is on an outer edge of the pedestals being an ultraviolet (UV)-curing DA material having a photoinitiator or a cured B-stage DA material. A cured thermally-curing DA material is on an area of the pedestals not occupied by the UV-curing DA material. A laminate component having bond pads on a top side is mounted top side up on the plurality of pedestals.Type: GrantFiled: September 17, 2018Date of Patent: February 11, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sadia Naseem, Vikas Gupta, Rongwei Zhang
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Publication number: 20200013634Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.Type: ApplicationFiled: July 5, 2018Publication date: January 9, 2020Inventors: Sadia Naseem, Vikas Gupta
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Publication number: 20190348746Abstract: A high frequency wireless device includes a three-dimensional (3D) antenna structure mounted on a PCB including a first antenna connected to a first waveguide feed and second antenna connected to a second waveguide feed. A packaged device on the PCB has a top metal surface including a transmit (Tx) radiating structure under the second waveguide feed and a receive (Rx) radiating structure under the first waveguide feed, and an RF connection from the top metal surface to its bottom surface. An IC die is flipchip attached to the bottom surface including at least one Rx channel and at least one Tx channel connected by the RF connection to the Rx and Tx radiating structures. Protruding metal features are on the dielectric layer under the first and second waveguide feeds on ?2 sides of the Tx and the Rx radiating structure to create a waveguiding wall structure for directing signals.Type: ApplicationFiled: October 4, 2018Publication date: November 14, 2019Inventors: VIKAS GUPTA, MEYSAM MOALLEM, SADIA NASEEM
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Publication number: 20190279955Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.Type: ApplicationFiled: March 7, 2018Publication date: September 12, 2019Applicant: Texas Instruments IncorporatedInventors: Benjamin Stassen Cook, Daniel Lee Revier, Sadia Naseem, Mahmud Halim Chowdhury