Abstract: A new synchronous Partial Response Maximum Likelihood (PRML) servo is provided for a high track-per-inch disk-drive system. To increase the data capacity in hard disk drives (HDD), one can shorten the servo format and/or increase the track density. The new servo system has circuits that allow a high-performance and accurate system for positioning the read-write heads. The major circuits include burst demodulation, Viterbi detection, timing synchronization, and spin-up search. A highly linear discrete-fourier-transform (DFT) burst-demodulation circuit can demodulate high-density and low-signal-to-noise-ratio (SNR) position bursts. The Viterbi detection circuit includes a sync-mark detector and a Viterbi detector that are matched to at least two sets of Gray code ( e.g., ¼ rate and 4/12 rate) and pruned accordingly. The timing synchronization circuit includes phase restart and interpolating timing recovery (ITR) circuits to implement a fully digital timing recovery.

Abstract: A new synchronous Partial Response Maximum Likelihood (PRML) servo is provided for a high track-per-inch disk-drive system. To increase the data capacity in hard disk drives (HDD), one can shorten the servo format and/or increase the track density. The new servo system has circuits that allow a high-performance and accurate system for positioning the read-write heads. The major circuits include burst demodulation, Viterbi detection, timing synchronization, and spin-up search. A highly linear discrete-fourier-transform (DFT) burst-demodulation circuit can demodulate high-density and low-signal-to-noise-ratio (SNR) position bursts. The Viterbi detection circuit includes a sync-mark detector and a Viterbi detector that are matched to at least two sets of Gray code ( e.g., ¼ rate and {fraction (4/12)} rate) and pruned accordingly. The timing synchronization circuit includes phase restart and interpolating timing recovery (ITR) circuits to implement a fully digital timing recovery.