Abstract: There is provided a semiconductor test apparatus including: a first waveform generating means that generates a common pattern waveform corresponding to common information common to each of a plurality of semiconductor devices; a plurality of second waveform generating means that generates individual pattern waveforms corresponding to a plurality of individual information individually prepared in response to each of the plurality of semiconductor devices; and a waveform switching unit that selectively performs an operation of inputting the common pattern waveform generated from the first waveform generating means in common and an operation of inputting the individual pattern waveforms respectively generated from the plurality of second waveform generating means individually, into each of the plurality of semiconductor devices.

Abstract: There is provided a semiconductor test apparatus including: a first waveform generating means that generates a common pattern waveform corresponding to common information common to each of a plurality of semiconductor devices; a plurality of second waveform generating means that generates individual pattern waveforms corresponding to a plurality of individual information individually prepared in response to each of the plurality of semiconductor devices; and a waveform switching unit that selectively performs an operation of inputting the common pattern waveform generated from the first waveform generating means in common and an operation of inputting the individual pattern waveforms respectively generated from the plurality of second waveform generating means individually, into each of the plurality of semiconductor devices.