Abstract: A split gate trench field effect transistor includes a gate electrode formed in a trench. A shield gate is formed in a trench below the gate electrode and surrounded by an insulating structure to float the shield electrode.

Abstract: A split gate trench field effect transistor includes a gate electrode formed in a trench. A shield gate is formed in a trench below the gate electrode and surrounded by an insulating structure to float the shield electrode.

Abstract: A semiconductor device can include first and second vertical channel power MOSFET transistors that are arranged in a split-gate configuration in a semiconductor substrate. A groove can be in an active region between the first and second vertical channel power MOSFET transistors and a conductive pattern can be in the groove on the active region, where the conductive pattern can include a source contact for the first and second vertical channel power MOSFET transistors. A vertical Schottky semiconductor region can be embedded in the groove beneath the conductive pattern between the vertical channels.

Abstract: Electrostatic discharge (ESD) protection circuits include first and second pads on an integrated circuit and first and second well regions in the integrated circuit substrate. The first and second well regions include respective first and second circumferences or walls. First and second diodes are included in the respective first and second well regions. The first and second diodes are serially connected between the first and second pads. A first guard ring is included adjacent the first circumference, and preferably in the first well. The first diode is included within the first guard ring. A second guard ring is also preferably included adjacent the second circumference, and most preferably in the second well. The second diode is included within the second guard ring.