Patents by Inventor Saeed Sharifi Tehrani

Saeed Sharifi Tehrani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941285
    Abstract: Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include, receiving a read request to perform a read operation on a block of the memory device; determining whether an entry corresponding to the block is stored in a data structure associated with the memory device; responsive to the entry being stored in the data structure, incrementing a counter associated with the block to track a number of read operations performed on the block of the memory device; resetting a timer associated with the block to an initial value, wherein the timer is to track a period of time that elapses since the read operation was performed on the block of the memory device; determining that the counter and the timer satisfy a first criterion; and responsive to determining that the counter and the timer satisfy the first criterion, removing the entry corresponding to the block from the data structure associated with the memory device.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: March 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Vamsi Pavan Rayaprolu, Kishore Kumar Muchherla, Ashutosh Malshe, Giuseppina Puzzilli, Saeed Sharifi Tehrani
  • Patent number: 11875868
    Abstract: Technologies for performing a quick reliability scan include, for a particular block of a set of blocks of different block types, each block of the set of blocks including pages of memory of a physical memory device, identifying subset of the pages of the block. The block is scanned by scanning the subset of the plurality of pages of the block for a fold condition. A page of the subset of the plurality of pages is determined to have the fold condition. After the set of blocks has been scanned, the folding of the block that includes the page that has been determined to have the fold condition is requested.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: January 16, 2024
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Saeed Sharifi Tehrani, Vamsi Pavan Rayaprolu
  • Patent number: 11789862
    Abstract: A total estimated occupancy value of a first data on a first data block of a plurality of data blocks is determined. To determine the total estimated occupancy value of the first data block, a total block power-on-time (POT) value of the first data block is determined. Then, a scaling factor is applied to the total block POT value to determine the total estimated occupancy value of the first data block. Whether the total estimated occupancy value of the first data block satisfies a threshold criterion is determined. Responsive to determining that the total estimated occupancy value of the first data block satisfies the threshold criterion, data stored at the first data block is relocated to a second data block of the plurality of data blocks.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: October 17, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Renato C. Padilla, Sampath K. Ratnam, Saeed Sharifi Tehrani, Peter Feeley, Kevin R. Brandt
  • Patent number: 11735274
    Abstract: A method includes receiving a request to perform a set of read operations. The method includes selecting a random read operation of the set of read operations, where the random read operation is performed on a first wordline located on a first portion of a first data block on a memory device. The method includes performing an error detection operation on a second wordline and a third wordline located on the first portion of the first data block to determine an error rate associated with the second wordline and third wordline, where the second wordline and the third wordline are adjacent to the first wordline. The method includes determining whether the error rate satisfies a threshold criterion responsive to determining that the error rate satisfies the threshold criterion and migrating data stored on the first portion of the first data block to a second data block on the memory device.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: August 22, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Saeed Sharifi Tehrani, Sivagnanam Parthasarathy
  • Publication number: 20230229317
    Abstract: Systems, methods, and apparatus related to controlling media scan in memory devices. In one approach, a controller manages a media scanning process for a memory (e.g., NAND flash memory) as a function of temperature. The controller collects temperature data from one or more sensors of the memory. Using the collected temperature data, the controller determines a moving average temperature. Based on the moving average temperature, the controller updates a frequency of the media scanning process.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 20, 2023
    Inventors: Saeed Sharifi Tehrani, Christopher M. Smitchger
  • Patent number: 11704178
    Abstract: Techniques for estimating raw bit error rate of data stored in a group of memory cells are described. Encoded data is read from a group of memory cells. A first population value is obtained based on a first number of memory cells in the group of memory cells having a read voltage within a first range of read voltages, each read voltage representing one or more bits of the encoded data. An estimated raw bit error rate of the data is determined to satisfy a first threshold. The determination is made using a first trained machine learning model and based in part on the first population value. A first media management operation is initiated in response to the determination that the estimated raw bit error rate satisfies the first threshold.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: July 18, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Saeed Sharifi Tehrani
  • Patent number: 11699498
    Abstract: Exemplary methods, apparatuses, and systems include receiving read operations. The read operations are divided into a current set of a sequence of read operations and one or more other sets of sequences of read operations. An aggressor read operation is selected from the current set. A position in the sequence of read operations in the current set is determined such that the position that is preceded by at least a minimum number of read operations following a previous data integrity scan in a previous set of read operations. A data integrity scan is performed on a victim of the aggressor read operation at the determined position in the sequence of the current set of read operations.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: July 11, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Saeed Sharifi Tehrani
  • Patent number: 11694758
    Abstract: Exemplary methods, apparatuses, and systems include receiving a plurality of read operations. The read operations are divided into a current set of a sequence of read operations and one or more other sets. The size of the current set is a first number of read operations. An aggressor read operation is selected from the current set. A data integrity scan is performed on a victim of the aggressor and a first indicator of data integrity is determined based on the first data integrity scan. A size of a subsequent set of read operations is set to a second number, which less than the first number, based on the indicator of data integrity.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: July 4, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Saeed Sharifi Tehrani, Gaurav Singh, Prashant Parashari
  • Publication number: 20230097679
    Abstract: Technologies for performing a quick reliability scan include, for a particular block of a set of blocks of different block types, each block of the set of blocks including pages of memory of a physical memory device, identifying subset of the pages of the block. The block is scanned by scanning the subset of the plurality of pages of the block for a fold condition. A page of the subset of the plurality of pages is determined to have the fold condition. After the set of blocks has been scanned, the folding of the block that includes the page that has been determined to have the fold condition is requested.
    Type: Application
    Filed: December 6, 2022
    Publication date: March 30, 2023
    Inventors: Saeed Sharifi Tehrani, Vamsi Pavan Rayaprolu
  • Patent number: 11609857
    Abstract: Exemplary methods, apparatuses, and systems include receiving a read operation directed to an aggressor location. An integrity scan of a victim location of the aggressor location is performed to determine an error value for the victim location. Data from the aggressor location is copied to a cache in response to determining the error value for the victim location satisfies a first error value threshold. The cache is a different type of memory from the aggressor location.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: March 21, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Saeed Sharifi Tehrani, Sivagnanam Parthasarathy, Aniryudh Reddy Durgam
  • Patent number: 11586679
    Abstract: The present disclosure includes apparatuses and methods for proactive corrective actions in memory based on a probabilistic data structure. A number of embodiments include a memory, and circuitry configured to input information associated with a subset of data stored in the memory into a probabilistic data structure and proactively determine, at least partially using the probabilistic data structure, whether to take a corrective action on the subset of data stored in the memory.
    Type: Grant
    Filed: February 15, 2021
    Date of Patent: February 21, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Saeed Sharifi Tehrani, Sivagnanam Parthasarathy
  • Publication number: 20230039624
    Abstract: Exemplary methods, apparatuses, and systems include receiving a plurality of read operations. The read operations are divided into a current set of a sequence of read operations and one or more other sets. The size of the current set is a first number of read operations. An aggressor read operation is selected from the current set. A data integrity scan is performed on a victim of the aggressor and a first indicator of data integrity is determined based on the first data integrity scan. A size of a subsequent set of read operations is set to a second number, which less than the first number, based on the indicator of data integrity.
    Type: Application
    Filed: August 9, 2021
    Publication date: February 9, 2023
    Inventors: Saeed Sharifi Tehrani, Gaurav Singh, Prashant Parashari
  • Patent number: 11545232
    Abstract: Technologies for performing a quick reliability scan include, for a particular block of a set of blocks of different block types. Each block of the set of blocks includes pages of memory of a physical memory device. A subset of the pages of the block is identified. The block is scanned by scanning the subset of the plurality of pages of the block for a fold condition. A page of the subset of the plurality of pages is determined to have the fold condition. After the set of blocks has been scanned, the folding of the block that includes the page that has been determined to have the fold condition is requested.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: January 3, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Saeed Sharifi Tehrani, Vamsi Pavan Rayaprolu
  • Patent number: 11545229
    Abstract: Exemplary methods, apparatuses, and systems include receiving a plurality of read operations. The read operations are divided into a current set of a sequence of read operations and one or more other sets. The size of the current set is a first number of read operations. An aggressor read operation is selected from the current set. A first data integrity scan is performed on a victim of the aggressor and a first indicator of data integrity is determined based on the first data integrity scan. In response to determining the first indicator of data integrity is greater than a current maximum value, the current maximum value is set to the first indicator of data integrity. In response to determining the current maximum value satisfies a threshold value, a size of a subsequent set of read operations is set to a second number, which less than the first number.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: January 3, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Saeed Sharifi Tehrani
  • Publication number: 20220391102
    Abstract: A memory system includes a memory device and a processing device, operatively coupled to the memory device. The processing device performs operations comprising: identifying one or more mandatory scan wordlines of the memory device and one or more remaining wordlines of the memory device; performing a plurality of scan iterations with respect to a plurality of pages of the memory device, such that performing each scan iteration comprises: identifying, among the remaining wordlines, one or more scheduled scan wordlines of the memory device, scanning a subset of pages of the memory device that are addressable by the mandatory scan wordlines and the scheduled scan wordlines; wherein a combination of a first plurality of pages addressable by the scheduled scan wordlines selected by the plurality of scan iterations and a second plurality of pages addressable by the mandatory wordlines comprises the plurality of pages of the memory device.
    Type: Application
    Filed: May 25, 2022
    Publication date: December 8, 2022
    Inventors: Vamsi Pavan Rayaprolu, Christopher M. Smitchger, Saeed Sharifi Tehrani
  • Publication number: 20220334751
    Abstract: Exemplary methods, apparatuses, and systems include receiving a plurality of read operations directed to a portion of memory accessed by a memory channel. The plurality of read operations are divided into a current set of a sequence of read operations and one or more other sets of sequences of read operations. An aggressor read operation is selected from the current set. A supplemental memory location is selected independently of aggressors and victims in the current set of read operations. A first data integrity scan is performed on a victim of the aggressor read operation and a second data integrity scan is performed on the supplemental memory location.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 20, 2022
    Inventors: Saeed Sharifi Tehrani, Ashutosh Malshe, Kishore Kumar Muchherla, Sivagnanam Parthasarathy, Vamsi Pavan Rayaprolu
  • Publication number: 20220334756
    Abstract: Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include, receiving a read request to perform a read operation on a block of the memory device; determining whether an entry corresponding to the block is stored in a data structure associated with the memory device; responsive to the entry being stored in the data structure, incrementing a counter associated with the block to track a number of read operations performed on the block of the memory device; resetting a timer associated with the block to an initial value, wherein the timer is to track a period of time that elapses since the read operation was performed on the block of the memory device; determining that the counter and the timer satisfy a first criterion; and responsive to determining that the counter and the timer satisfy the first criterion, removing the entry corresponding to the block from the data structure associated with the memory device.
    Type: Application
    Filed: April 20, 2021
    Publication date: October 20, 2022
    Inventors: Vamsi Pavan Rayaprolu, Kishore Kumar Muchherla, Ashutosh Malshe, Giuseppina Puzzilli, Saeed Sharifi Tehrani
  • Patent number: 11474738
    Abstract: Exemplary methods, apparatuses, and systems include receiving a plurality of read operations directed to a portion of memory accessed by a memory channel. The plurality of read operations are divided into a current set of a sequence of read operations and one or more other sets of sequences of read operations. An aggressor read operation is selected from the current set. A supplemental memory location is selected independently of aggressors and victims in the current set of read operations. A first data integrity scan is performed on a victim of the aggressor read operation and a second data integrity scan is performed on the supplemental memory location.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: October 18, 2022
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Saeed Sharifi Tehrani, Ashutosh Malshe, Kishore Kumar Muchherla, Sivagnanam Parthasarathy, Vamsi Pavan Rayaprolu
  • Patent number: 11467737
    Abstract: Exemplary methods, apparatuses, and systems include receiving read operations. The read operations are divided into a current set of a sequence of read operations and one or more other sets of sequences of read operations. An aggressor read operation is selected from the current set. An identifier of a memory location read by the aggressor read operation is stored and, in response to determining a data integrity scan of a victim location of the aggressor read operation will collide with a host operation, the data integrity scan is delayed. In response to a trigger condition being satisfied, the delayed data integrity scan of the victim location of the aggressor read operation is performed.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: October 11, 2022
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Saeed Sharifi Tehrani
  • Patent number: 11467897
    Abstract: Exemplary methods, apparatuses, and systems include detecting a trigger to update a data integrity scan frequency. In response to detecting the trigger, an age indicator for a subdivision of memory or a utilization value for the subdivision of memory are obtained. A new data integrity scan frequency is determined using the age indicator or the utilization value. A scan of the subdivision of memory is initiated during a current media scan loop using the new data integrity scan frequency.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: October 11, 2022
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Saeed Sharifi Tehrani