Patents by Inventor Saeed Shojaie

Saeed Shojaie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10847450
    Abstract: A bond-wire system including a wire bond that is deflected above a dielectric ridge at a die edge. The deflected wire bond allows for both a lowered Z-profile and a reduced X-Y footprint. The bond-wire system may include a stacked-die configuration where a stacked die is wire bonded and the stacked-die bond wire is deflected above a dielectric ridge at the stacked die edge.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: November 24, 2020
    Assignee: Intel Corporation
    Inventors: Saeed Shojaie, Hyoung Il Kim, Bilal Khalaf, Min-Tih Ted Lai
  • Publication number: 20190181072
    Abstract: A bond-wire system including a wire bond that is deflected above a dielectric ridge at a die edge. The deflected wire bond allows for both a lowered Z-profile and a reduced X-Y footprint. The bond-wire system may include a stacked-die configuration where a stacked die is wire bonded and the stacked-die bond wire is deflected above a dielectric ridge at the stacked die edge.
    Type: Application
    Filed: September 28, 2016
    Publication date: June 13, 2019
    Inventors: Saeed SHOJAIE, Hyoung IL KIM, Bilal KHALAF, Min-Tih TED LAI
  • Publication number: 20180138159
    Abstract: One or more example embodiments of miniaturized electric devices are disclosed. In some example embodiments, the electric device includes a first thin substrate layer and a second thin substrate layer positioned above the first thin substrate layer. The electric device further includes one or more components electrically coupled to the first thin substrate layer. An overmold compound is deposited covering the one or more components between the first thin substrate and the second thin substrate. The electric device further includes one or more through mold vias that electrically and communicatively connect the first thin substrate layer and the second thin substrate layer.
    Type: Application
    Filed: September 22, 2017
    Publication date: May 17, 2018
    Inventors: Mark Melone, Saeed Shojaie
  • Patent number: 9773764
    Abstract: One or more example embodiments of miniaturized electric devices are disclosed. In some example embodiments, the electric device includes a first thin substrate layer and a second thin substrate layer positioned above the first thin substrate layer. The electric device further includes one or more components electrically coupled to the first thin substrate layer. An overmold compound is deposited covering the one or more components between the first thin substrate and the second thin substrate. The electric device further includes one or more through mold vias that electrically and communicatively connect the first thin substrate layer and the second thin substrate layer.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: September 26, 2017
    Assignee: Intel Corporation
    Inventors: Mark Melone, Saeed Shojaie
  • Publication number: 20170179090
    Abstract: One or more example embodiments of miniaturized electric devices are disclosed. in some example embodiments, the electric device includes a first thin substrate layer and a second thin substrate layer positioned above the first thin substrate layer. The electric device further includes one or more components electrically coupled to the first thin substrate layer. An overmold compound is deposited covering the one or more components between the first thin substrate and the second thin substrate. The electric device further includes one or more through mold vias that electrically and communicatively connect the first thin substrate layer and the second thin substrate layer.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Inventors: Mark Melone, Saeed Shojaie
  • Patent number: 7372133
    Abstract: A method of forming a leadframe package, a leadframe package formed according to the method, and a system incorporating the leadframe package. The leadframe package includes: a metallization layer comprising a paddle portion and a contact portion including contact leads; a die mounted onto the paddle portion; wirebonds connected between the die and respective ones of the contact leads; an overmold encapsulating the die, the paddle portion, the contact leads and the wirebonds; and a stiffening element encapsulated in the overmold and unconnected to electrical pathways within the leadframe package.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: May 13, 2008
    Assignee: Intel Corporation
    Inventors: Saeed Shojaie, Brian Taggart, Dale Hackitt
  • Publication number: 20070126094
    Abstract: A method of forming a leadframe package, a leadframe package formed according to the method, and a system incorporating the leadframe package. The leadframe package includes: a metallization layer comprising a paddle portion and a contact portion including contact leads; a die mounted onto the paddle portion; wirebonds connected between the die and respective ones of the contact leads; an overmold encapsulating the die, the paddle portion, the contact leads and the wirebonds; and a stiffening element encapsulated in the overmold and unconnected to electrical pathways within the leadframe package.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 7, 2007
    Inventors: Saeed Shojaie, Brian Taggart, Dale Hackitt
  • Patent number: 7141452
    Abstract: Methods of forming microelectronic devices by disposing a radiation curable underfill material or adhesive material between a substrate and a microelectronic die, and exposing any radiation curable material which bleeds-out therefrom to radiation before or immediately after disposition, thereby reducing the extent of material bleed-out.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: November 28, 2006
    Assignee: Intel Corporation
    Inventors: Mahesh Sambasivam, Drew W. Delaney, Saeed Shojaie
  • Publication number: 20050118748
    Abstract: Method of forming microeletronic devices by disposing a radiation curable underfill material or adhesive material between a substrate and a microelectronic die, and exposing any the radiation curable material which bleeds-out therefrom to radiation before or immediately after disposition, thereby reducing the extent of material bleed-out.
    Type: Application
    Filed: December 1, 2003
    Publication date: June 2, 2005
    Inventors: Mahesh Sambasivam, Drew Delaney, Saeed Shojaie