Abstract: A RF tuner is described for handling RF signals in a broad frequency range and a broad power range while maintaining high linearity and tolerating high power blockers. A continuous feedback loop comprising a substantially linear LNA and a radio frequency RSSI can adjust the power of the RF signal on the RF side. On the IF side, a continuous feedback loop comprising a substantially linear, variable gain transconductor and a RSSI can adjust the power of the IF signal.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: A system and method are provided for calibrating the IQ-imbalance in a low-IF receiver. A Test Signal can be generated in a mirror frequency and conveyed to the receiver. The power of the signal produced in the receiver from the conveyed Test Signal can be measured. In the absence of an IQ-imbalance, the Test Signal can be completely eliminated in the receiver and the corresponding measured power of the produced signal can be minimized. Accordingly, a two dimensional algorithm is described for calibrating a receiver and correcting the IQ-imbalance by adjusting the phase and gain difference between the I and Q channels in the receiver based on the measured power of the signal produced in the receiver.

Abstract: Systems and methods are described for the implementation of a full band cable receiver by using a combination of tuners (e.g., ultra-low power Tuners) and Analog-to-Digital Converters (ADCs) to attain the goal of digitization with reduced power and/or cost. The full-band capture cable receiver can overcome the constraints of conventional cable receiver systems and deliver multiple channels, thereby allowing operators to provide consumers with an increased number of services.

Abstract: Systems and methods are described for the implementation of a full band cable receiver by using a combination of tuners (e.g., ultra-low power Tuners) and Analog-to-Digital Converters (ADCs) to attain the goal of digitization with reduced power and/or cost. The full-band capture cable receiver can overcome the constraints of conventional cable receiver systems and deliver multiple channels, thereby allowing operators to provide consumers with an increased number of services.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: A system and method are provided for calibrating the IQ-imbalance in a low-IF receiver. A Test Signal can be generated in a mirror frequency and conveyed to the receiver. The power of the signal produced in the receiver from the conveyed Test Signal can be measured. In the absence of an IQ-imbalance, the Test Signal can be completely eliminated in the receiver and the corresponding measured power of the produced signal can be minimized. Accordingly, a two dimensional algorithm is described for calibrating a receiver and correcting the IQ-imbalance by adjusting the phase and gain difference between the I and Q channels in the receiver based on the measured power of the signal produced in the receiver.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: An RE receiver is described comprising a common gate common source LNA with a variable resistor in the source of the common gate transistor, a variable resistor in the source of the common source transistor, and a variable resistor in the RE input. A Smart Gain Control varies the resistance in the resistors to produce linear amplification in the LNA while maintaining input matching. Further, a broad dynamic range RSSI is described that implements a feedback control loop to maintain signal power within a sensitivity range of the power detector in the RSSI.

Abstract: An RF receiver is described comprising a common gate common source LNA with a variable resistor in the source of the common gate transistor, a variable resistor in the source of the common source transistor, and a variable resistor in the RF input. A Smart Gain Control varies the resistance in the resistors to produce linear amplification in the LNA while maintaining input matching. Further, a broad dynamic range RSSI is described that implements a feedback control loop to maintain signal power within a sensitivity range of the power detector in the RSSI.

Abstract: An incoming RF signal can be amplified in a RF front end of a RF receiver by conveying the signal through one of a multiple amplification paths. On each path, the gain can be controlled by RF automatic gain control (AGC) circuits. Each amplification path can be designed to handle incoming signals in a designated power range and to optimize receiver performance characteristics such as the noise figure (NF) and odd harmonic linearity in that power range. Signal power can be measured at different locations of the receiver and bypass switches can be used to convey the RF signals down one of the multiple paths based on the power measurements, according to executable logical code. An incoming signal power hysteresis can be applied to stabilize the system. Further, signal power averaging and switch delaying mechanisms can be employed to stabilize the system for rapidly fluctuating signals.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: A system and method are provided for calibrating the IQ-imbalance in a low-IF receiver. A Test Signal can be generated in a mirror frequency and conveyed to the receiver. The power of the signal produced in the receiver from the conveyed Test Signal can be measured. In the absence of an IQ-imbalance, the Test Signal can be completely eliminated in the receiver and the corresponding measured power of the produced signal can be minimized. Accordingly, a two dimensional algorithm is described for calibrating a receiver and correcting the IQ-imbalance by adjusting the phase and gain difference between the I and Q channels in the receiver based on the measured power of the signal produced in the receiver.

Abstract: An RE receiver is described comprising a common gate common source LNA with a variable resistor in the source of the common gate transistor, a variable resistor in the source of the common source transistor, and a variable resistor in the RE input. A Smart Gain Control varies the resistance in the resistors to produce linear amplification in the LNA while maintaining input matching. Further, a broad dynamic range RSSI is described that implements a feedback control loop to maintain signal power within a sensitivity range of the power detector in the RSSI.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: An incoming RF signal can be amplified in a RF front end of a RF receiver by conveying the signal through one of a multiple amplification paths. On each path, the gain can be controlled by RF automatic gain control (AGC) circuits. Each amplification path can be designed to handle incoming signals in a designated power range and to optimize receiver performance characteristics such as the noise figure (NF) and odd harmonic linearity in that power range. Signal power can be measured at different locations of the receiver and bypass switches can be used to convey the RF signals down one of the multiple paths based on the power measurements, according to executable logical code. An incoming signal power hysteresis can be applied to stabilize the system. Further, signal power averaging and switch delaying mechanisms can be employed to stabilize the system for rapidly fluctuating signals.

Abstract: A system and method are provided for calibrating the IQ-imbalance in a low-IF receiver. A Test Signal can be generated in a mirror frequency and conveyed to the receiver. The power of the signal produced in the receiver from the conveyed Test Signal can be measured. In the absence of an IQ-imbalance, the Test Signal can be completely eliminated in the receiver and the corresponding measured power of the produced signal can be minimized. Accordingly, a two dimensional algorithm is described for calibrating a receiver and correcting the IQ-imbalance by adjusting the phase and gain difference between the I and Q channels in the receiver based on the measured power of the signal produced in the receiver.

Abstract: An incoming RF signal can be amplified in a RF front end of a RF receiver by conveying the signal through one of a multiple amplification paths. On each path, the gain can be controlled by RF automatic gain control (AGC) circuits. Each amplification path can be designed to handle incoming signals in a designated power range and to optimize receiver performance characteristics such as the noise figure (NF) and odd harmonic linearity in that power range. Signal power can be measured at different locations of the receiver and bypass switches can be used to convey the RF signals down one of the multiple paths based on the power measurements, according to executable logical code. An incoming signal power hysteresis can be applied to stabilize the system. Further, signal power averaging and switch delaying mechanisms can be employed to stabilize the system for rapidly fluctuating signals.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: An incoming RF signal can be amplified in a RF front end of a RF receiver by conveying the signal through one of a multiple amplification paths. On each path, the gain can be controlled by RF automatic gain control (AGC) circuits. Each amplification path can be designed to handle incoming signals in a designated power range and to optimize receiver performance characteristics such as the noise figure (NF) and odd harmonic linearity in that power range. Signal power can be measured at different locations of the receiver and bypass switches can be used to convey the RF signals down one of the multiple paths based on the power measurements, according to executable logical code. An incoming signal power hysteresis can be applied to stabilize the system. Further, signal power averaging and switch delaying mechanisms can be employed to stabilize the system for rapidly fluctuating signals.