Patents by Inventor Sagar A. Kekare
Sagar A. Kekare has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11348222Abstract: Methods and systems for inspection of wafers and reticles using designer intent data are provided. One computer-implemented method includes identifying nuisance defects on a wafer based on inspection data produced by inspection of a reticle, which is used to form a pattern on the wafer prior to inspection of the wafer. Another computer-implemented method includes detecting defects on a wafer by analyzing data generated by inspection of the water in combination with data representative of a reticle, which includes designations identifying different types of portions of the reticle. An additional computer-implemented method includes determining a property of a manufacturing process used to process a wafer based on defects that alter a characteristic of a device formed on the wafer. Further computer-implemented methods include altering or simulating one or more characteristics of a design of an integrated circuit based on data generated by inspection of a wafer.Type: GrantFiled: November 7, 2019Date of Patent: May 31, 2022Assignee: KLA-Tencor Technologies Corp.Inventors: Paul Frank Marella, Sharon McCauley, Ellis Chang, William Volk, James Wiley, Sterling Watson, Sagar A. Kekare, Carl Hess
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Patent number: 10713771Abstract: Methods and systems for inspection of wafers and reticles using designer intent data are provided. One computer-implemented method includes identifying nuisance defects on a wafer based on inspection data produced by inspection of a reticle, which is used to form a pattern on the wafer prior to inspection of the wafer. Another computer-implemented method includes detecting defects on a wafer by analyzing data generated by inspection of the wafer in combination with data representative of a reticle, which includes designations identifying different types of portions of the reticle. An additional computer-implemented method includes determining a property of a manufacturing process used to process a wafer based on defects that alter a characteristic of a device formed on the wafer. Further computer-implemented methods include altering or simulating one or more characteristics of a design of an integrated circuit based on data generated by inspection of a wafer.Type: GrantFiled: April 25, 2018Date of Patent: July 14, 2020Assignee: KLA-Tencor Technologies Corp.Inventors: Paul Frank Marella, Sharon McCauley, Ellis Chang, William Volk, James Wiley, Sterling Watson, Sagar A. Kekare, Carl Hess
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Publication number: 20200074619Abstract: Methods and systems for inspection of wafers and reticles using designer intent data are provided. One computer-implemented method includes identifying nuisance defects on a wafer based on inspection data produced by inspection of a reticle, which is used to form a pattern on the wafer prior to inspection of the wafer. Another computer-implemented method includes detecting defects on a wafer by analyzing data generated by inspection of the water in combination with data representative of a reticle, which includes designations identifying different types of portions of the reticle. An additional computer-implemented method includes determining a property of a manufacturing process used to process a wafer based on defects that alter a characteristic of a device formed on the wafer. Further computer-implemented methods include altering or simulating one or more characteristics of a design of an integrated circuit based on data generated by inspection of a wafer.Type: ApplicationFiled: November 7, 2019Publication date: March 5, 2020Inventors: Paul Frank Marella, Sharon McCauley, Ellis Chang, William Volk, James Wiley, Sterling Watson, Sagar A. Kekare, Carl Hess
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Patent number: 10303839Abstract: Methods and systems for determining electrically relevant placement of metrology targets using design analysis are disclosed. The method may include: identifying at least one critical design element of an integrated circuit based on a design of the integrated circuit; determining whether the design of the integrated circuit allows for an insertion of a metrology target in a vicinity of the at least one critical design element; and modifying the design of the integrated circuit by inserting a metrology target into the vicinity of the at least one critical design element when the design of the integrated circuit allows for the insertion of the metrology target.Type: GrantFiled: December 20, 2016Date of Patent: May 28, 2019Assignee: KLA-Tencor CorporationInventor: Sagar A. Kekare
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Patent number: 10209628Abstract: A method for automatically classifying one or more defects based on electrical design properties includes receiving one or more images of a selected region of a sample, receiving one or more sets of design data associated with the selected region of the sample, locating one or more defects in the one or more images of the selected region of the sample by comparing the one or more images of the selected region of the sample to the one or more sets of design data, retrieving one or more patterns of interest from the one or more sets of design data corresponding to the one or more defects, and classifying the one or more defects in the one or more images of the selected region of the sample based on one or more annotated electrical design properties included in the one or more patterns of interest.Type: GrantFiled: October 4, 2016Date of Patent: February 19, 2019Assignee: KLA-Tencor CorporationInventors: Prasanti Uppaluri, Thirupurasundari Jayaraman, Ardis Liang, Srikanth Kandukuri, Sagar Kekare
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Publication number: 20180247403Abstract: Methods and systems for inspection of wafers and reticles using designer intent data are provided. One computer-implemented method includes identifying nuisance defects on a wafer based on inspection data produced by inspection of a reticle, which is used to form a pattern on the wafer prior to inspection of the wafer. Another computer-implemented method includes detecting defects on a wafer by analyzing data generated by inspection of the wafer in combination with data representative of a reticle, which includes designations identifying different types of portions of the reticle. An additional computer-implemented method includes determining a property of a manufacturing process used to process a wafer based on defects that alter a characteristic of a device formed on the wafer. Further computer-implemented methods include altering or simulating one or more characteristics of a design of an integrated circuit based on data generated by inspection of a wafer.Type: ApplicationFiled: April 25, 2018Publication date: August 30, 2018Inventors: Paul Frank Marella, Sharon McCauley, Ellis Chang, William Volk, James Wiley, Sterling Watson, Sagar A. Kekare, Carl Hess
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Publication number: 20170351804Abstract: Methods and systems for determining electrically relevant placement of metrology targets using design analysis are disclosed. The method may include: identifying at least one critical design element of an integrated circuit based on a design of the integrated circuit; determining whether the design of the integrated circuit allows for an insertion of a metrology target in a vicinity of the at least one critical design element; and modifying the design of the integrated circuit by inserting a metrology target into the vicinity of the at least one critical design element when the design of the integrated circuit allows for the insertion of the metrology target.Type: ApplicationFiled: December 20, 2016Publication date: December 7, 2017Inventor: Sagar A. Kekare
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Publication number: 20170344695Abstract: A method for automatically classifying one or more defects based on electrical design properties includes receiving one or more images of a selected region of a sample, receiving one or more sets of design data associated with the selected region of the sample, locating one or more defects in the one or more images of the selected region of the sample by comparing the one or more images of the selected region of the sample to the one or more sets of design data, retrieving one or more patterns of interest from the one or more sets of design data corresponding to the one or more defects, and classifying the one or more defects in the one or more images of the selected region of the sample based on one or more annotated electrical design properties included in the one or more patterns of interest.Type: ApplicationFiled: October 4, 2016Publication date: November 30, 2017Inventors: Prasanti Uppaluri, Thirupurasundari Jayaraman, Ardis Liang, Srikanth Kandukuri, Sagar Kekare
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Patent number: 9689923Abstract: A method and a system for determining one or more parameters for electrical testing of a wafer are provided. One method includes determining electrical test paths through a device being formed on a wafer and physical layout components in different layers of the device corresponding to each of the electrical test paths. The method also includes determining one or more parameters of electrical testing for the wafer based on one or more characteristics of the electrical test paths. In addition, the method includes acquiring information for one or more characteristics of a physical version of the wafer. The information is generated by performing an inline process on the physical version of the wafer. The method further includes altering at least one of the one or more parameters of the electrical testing for the wafer based on the acquired information.Type: GrantFiled: August 1, 2014Date of Patent: June 27, 2017Assignee: KLA-Tencor Corp.Inventor: Sagar A. Kekare
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Patent number: 9401014Abstract: Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.Type: GrantFiled: December 19, 2014Date of Patent: July 26, 2016Assignee: KLA-Tencor Technologies Corp.Inventors: Khurram Zafar, Sagar Kekare, Ellis Chang, Allen Park, Peter Rose
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Patent number: 9400865Abstract: Methods and systems for extracting comprehensive design guidance for in-line process control of wafers are provided. One method includes automatically identifying potential marginalities in a design for a device to be formed on a wafer. The method also includes automatically generating information for the potential marginalities. The automatically generated information is used to set up process control for the wafer.Type: GrantFiled: June 10, 2015Date of Patent: July 26, 2016Assignee: KLA-Tencor Corp.Inventors: Sagar A. Kekare, Sergei G. Bakarian
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Publication number: 20150363537Abstract: Methods and systems for extracting comprehensive design guidance for in-line process control of wafers are provided. One method includes automatically identifying potential marginalities in a design for a device to be formed on a wafer. The method also includes automatically generating information for the potential marginalities. The automatically generated information is used to set up process control for the wafer.Type: ApplicationFiled: June 10, 2015Publication date: December 17, 2015Inventors: Sagar A. Kekare, Sergei G. Bakarian
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Publication number: 20150178914Abstract: Methods and systems for inspection of wafers and reticles using designer intent data are provided. One computer-implemented method includes identifying nuisance defects on a wafer based on inspection data produced by inspection of a reticle, which is used to form a pattern on the wafer prior to inspection of the wafer. Another computer-implemented method includes detecting defects on a wafer by analyzing data generated by inspection of the wafer in combination with data representative of a reticle, which includes designations identifying different types of portions of the reticle. An additional computer-implemented method includes determining a property of a manufacturing process used to process a wafer based on defects that alter a characteristic of a device formed on the wafer. Further computer-implemented methods include altering or simulating one or more characteristics of a design of an integrated circuit based on data generated by inspection of a wafer.Type: ApplicationFiled: March 4, 2015Publication date: June 25, 2015Inventors: Paul Frank Marella, Sharon McCauley, Ellis Chang, William Volk, James Wiley, Sterling Watson, Sagar A. Kekare, Carl Hess
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Publication number: 20150154746Abstract: Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.Type: ApplicationFiled: December 19, 2014Publication date: June 4, 2015Inventors: Khurram Zafar, Sagar Kekare, Ellis Chang, Allen Park, Peter Rose
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Patent number: 9002497Abstract: Methods and systems for inspection of wafers and reticles using designer intent data are provided. One computer-implemented method includes identifying nuisance defects on a wafer based on inspection data produced by inspection of a reticle, which is used to form a pattern on the wafer prior to inspection of the wafer. Another computer-implemented method includes detecting defects on a wafer by analyzing data generated by inspection of the wafer in combination with data representative of a reticle, which includes designations identifying different types of portions of the reticle. An additional computer-implemented method includes determining a property of a manufacturing process used to process a wafer based on defects that alter a characteristic of a device formed on the wafer. Further computer-implemented methods include altering or simulating one or more characteristics of a design of an integrated circuit based on data generated by inspection of a wafer.Type: GrantFiled: July 1, 2004Date of Patent: April 7, 2015Assignee: KLA-Tencor Technologies Corp.Inventors: William Volk, James Wiley, Sterling Watson, Sagar A. Kekare, Carl Hess, Paul Frank Marella, Sharon McCauley, Ellis Chang
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Publication number: 20150039954Abstract: Methods and systems for determining one or more parameters for electrical testing of a wafer are provided. One method includes determining electrical test paths through a device being formed on a wafer and physical layout components in different layers of the device corresponding to each of the electrical test paths. The method also includes determining one or more parameters of electrical testing for the wafer based on one or more characteristics of the electrical test paths. In addition, the method includes acquiring information for one or more characteristics of a physical version of the wafer. The information is generated by performing an inline process on the physical version of the wafer. The method further includes altering at least one of the one or more parameters of the electrical testing for the wafer based on the acquired information.Type: ApplicationFiled: August 1, 2014Publication date: February 5, 2015Inventor: Sagar A. Kekare
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Patent number: 8923600Abstract: Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.Type: GrantFiled: August 3, 2009Date of Patent: December 30, 2014Assignee: KLA-Tencor Technologies Corp.Inventors: Khurram Zafar, Sagar Kekare, Ellis Chang, Allen Park, Peter Rose
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Patent number: 8549445Abstract: Targeted production control using multivariate analysis of design marginalities. A list of a plurality of metrology operations is accessed during production of an integrated circuit device. The list is generated from operations performed in the design of the integrated circuit device. At least one of the plurality of metrology operations is performed on the integrated circuit device. A manufacturing process of the integrated circuit device may be adjusted responsive to results of the performing.Type: GrantFiled: February 8, 2011Date of Patent: October 1, 2013Assignee: Synopsys, Inc.Inventor: Sagar Kekare
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Publication number: 20120131527Abstract: Targeted production control using multivariate analysis of design marginalities. A list of a plurality of metrology operations is accessed during production of an integrated circuit device. The list is generated from operations performed in the design of the integrated circuit device. At least one of the plurality of metrology operations is performed on the integrated circuit device. A manufacturing process of the integrated circuit device may be adjusted responsive to results of the performing.Type: ApplicationFiled: February 8, 2011Publication date: May 24, 2012Applicant: SYNOPSYS, INC.Inventor: Sagar Kekare
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Patent number: 7769225Abstract: Computer-implemented methods and systems for detecting defects in a reticle design pattern are provided. One computer-implemented method includes acquiring images of a field in the reticle design pattern. The images illustrate how the field will be printed on a wafer at different values of one or more parameters of a wafer printing process. The field includes a first die and a second die. The method also includes detecting defects in the field based on a comparison of two or more of the images corresponding to two or more of the different values. In addition, the method includes determining if individual defects located in the first die have substantially the same within die position as individual defects located in the second die.Type: GrantFiled: December 20, 2005Date of Patent: August 3, 2010Assignee: KLA-Tencor Technologies Corp.Inventors: Sagar A. Kekare, Ingrid B. Peterson, Moshe E. Preil