Abstract: While booting a host computing device on a cloud computing system, system firmware (such as Basic Input/Output System (BIOS) or Unified Extensible Firmware Interface (UEFI)) sends a query to a management subsystem (such as a baseboard management controller (BMC)) for updated configuration data used during a boot of the host computing device. The management subsystem sends the updated configuration data to the system firmware, and boot instructions in the system firmware compare the updated configuration data with configuration data stored on the host computing device. If the respective configuration data match, the boot instructions continue with booting the host computing device. If the configuration data do not match, then the boot instructions update the stored configuration data with the updated configuration data and then proceed to boot the host computing device.

Abstract: While booting a host computing device on a cloud computing system, system firmware (such as Basic Input/Output System (BIOS) or Unified Extensible Firmware Interface (UEFI)) sends a query to a management subsystem (such as a baseboard management controller (BMC)) for updated configuration data used during a boot of the host computing device. The management subsystem sends the updated configuration data to the system firmware, and boot instructions in the system firmware compare the updated configuration data with configuration data stored on the host computing device. If the respective configuration data match, the boot instructions continue with booting the host computing device. If the configuration data do not match, then the boot instructions update the stored configuration data with the updated configuration data and then proceed to boot the host computing device.

Abstract: A computer system includes a host processor including a hardware interrupt pin. The computer system also includes host firmware including an interrupt handler. The interrupt handler includes a plurality of sets of instructions that are executable by the host processor. The computer system also includes a baseboard management controller (BMC) that is connected to the hardware interrupt pin. The BMC is configured to generate an interrupt signal on the hardware interrupt pin in response to occurrence of a triggering event. The BMC is also configured to provide the host processor with context information that identifies a set of instructions in the host firmware that should be executed in response to the interrupt signal.

Abstract: A computer system includes a host processor including a hardware interrupt pin. The computer system also includes host firmware including an interrupt handler. The interrupt handler includes a plurality of sets of instructions that are executable by the host processor. The computer system also includes a baseboard management controller (BMC) that is connected to the hardware interrupt pin. The BMC is configured to generate an interrupt signal on the hardware interrupt pin in response to occurrence of a triggering event. The BMC is also configured to provide the host processor with context information that identifies a set of instructions in the host firmware that should be executed in response to the interrupt signal.