Abstract: Methods and structure are provided for maintaining gate training parameters for Random Access Memory. The system comprises a memory controller and a management unit. The management unit is able to initialize the system after the system returns from an unpowered state by accessing a non-volatile memory to retrieve timing intervals for electrical impulses sent between the memory controller and a Random Access Memory. The timing intervals previously enabled communication between the memory controller and the Random Access Memory. The management unit is further able to initialize the system after the system returns from an unpowered state by calibrating the memory controller to enable communication with the Random Access Memory based on the retrieved timing intervals.

Abstract: Methods and structure for diagnosing errors in the initialization of DDR memory “on board” a storage controller or a storage expander are presented herein. The features and aspects discussed herein allow for the debugging of the DDR memory initialization. A memory diagnostic system is operable on a storage controller and includes an initialization module in communication with a firmware module of the storage controller. The memory diagnostic system is adapted to initialize a Double Date Rate (DDR) memory of the storage controller. The memory diagnostic system also includes an application programming interface adapted to retrieve initialization information from the initialization module and transfer the initialization information to a debug system via a direct communication link between the application programming interface and the debug system to diagnose the initialization of the DDR memory and to debug the initialization module based on the initialization information.

Abstract: The present invention is directed to a method of operation of a host system by which the host system obtains a driver necessary for running a device (ex.—peripheral device, such as a USB stick, printer, etc.) connected to the host system in an operating system of the host system. In the method(s) disclosed herein, the driver (ex.—host driver) is embedded within in an on-board memory of the device itself. The host system queries the device to determine if and where within the device the driver is located and uploads the driver from the peripheral device. This promotes improved efficiency since the host does not have to store drivers it may not need, but can just obtain the driver from the peripheral device once the peripheral device is connected to the host.

Abstract: A data-duplicating expander device attachable to a storage topology and a method. The data-duplicating expander device may include a direct-attached SAS expander configured for direct duplication of data from source disks to destination disks by bypassing transfer to or from a host system. The device may include dedicated expander phys and a processor. The device may be configured to receive instructions from an initiator storage-topology-connected device to configure or start a data transfer. The data-duplicating expander device may be configured to receive source data from source disks by utilizing dedicated expander phys and may be configured to transfer destination data directly and simultaneously to the destination disks by utilizing dedicated expander phys, said destination data being associated with the source data. Directly transferring destination data bypasses transfer of the source data or the destination data to or from a host system.

Abstract: Methods and apparatus for improved storage network performance by embedding logical volume control within a switching component of a storage network. An enhanced storage network switching component comprises a logical volume manager that aggregates a plurality of ports/PHYS of the switch (each coupled with a corresponding target storage device) to create and manage a logical volume. The manager exposes only a single port/PHY for access to the logical volume. Other ports/PHYs for the individual target storage devices of the logical volume are disabled so that attached host/initiator components cannot access the individual storage devices of the logical volume. In one exemplary embodiment, the logical volume is a striped logical volume to enable parallel operation of multiple storage devices for processing an I/O request. The speed of communications between the switching component and the host/initiator component may then be better matched with the performance of the logical volume.

Abstract: Methods and structure for diagnosing errors in the initialization of DDR memory “on board” a storage controller or a storage expander are presented herein. The features and aspects discussed herein allow for the debugging of the DDR memory initialization. A memory diagnostic system is operable on a storage controller and includes an initialization module in communication with a firmware module of the storage controller. The memory diagnostic system is adapted to initialize a Double Date Rate (DDR) memory of the storage controller. The memory diagnostic system also includes an application programming interface adapted to retrieve initialization information from the initialization module and transfer the initialization information to a debug system via a direct communication link between the application programming interface and the debug system to diagnose the initialization of the DDR memory and to debug the initialization module based on the initialization information.

Abstract: Methods and apparatuses for improving detection of a Serial Advanced Technology Attachment (“SATA”) target device by a storage initiator over a link. The storage initiator receives a Frame Information Structure (“FIS”) and determines whether the FIS is valid. In direct response to a determination that the FIS is invalid, the storage initiator immediately resets the link to the SATA target device.

Abstract: Methods and apparatuses for improving detection of a Serial Advanced Technology Attachment (“SATA”) target device by a storage initiator over a link. The storage initiator receives a Frame Information Structure (“FIS”) and determines whether the FIS is valid. In direct response to a determination that the FIS is invalid, the storage initiator immediately resets the link to the SATA target device.