Abstract: Integrated optical drivers for optical interconnect technologies and associated optical communication systems, components, and devices are disclosed. An example integrated optical driver may include a first input terminal and a second input terminal, a first transconductance transistor coupled with the first input terminal, a second transconductance transistor coupled with the second input terminal, a first cascode circuit coupled with a drain terminal of the first transconductance transistor, and a second cascode circuit coupled with a drain terminal of the second transconductance transistor and further coupled with the first cascode circuit.

Abstract: An optical driver device for driving a light emitting device includes a high-frequency current driver including a first switching circuit configured to generate a first portion of modulation current for driving the light emitting device. The first portion of modulating current is provided to the light emitting device via a coupling capacitor. The high-frequency current driver is configured in current-mode driver topology that utilizes a first current source for generating the first portion of the modulation current. The optical driver device further includes a second switching circuit configured to generate a second portion of modulation current for driving the light emitting device. The second portion of modulation current is provided to the light emitting device via a path that bypasses the coupling capacitor. The low-frequency current driver configured in current-mode driver topology that utilizes a second current source for generating the second portion of modulation current.

Abstract: An optical transmitter includes a DAC, a timing circuit, and circuitry. The DAC includes switches configured to convert digital data into analog data that is modulated into an optical signal for transmission over an optical fiber. The timing circuit is configured to generate timing signals to control the switches of the DAC. The circuitry is configured to control an output data rate of the DAC by biasing the switches based on a logical combination of the digital data and the timing signals. An optical transmitter includes DACs and a driver. The DACs are configured to receive digital data at a first data rate and to output currents at a second data rate that is greater than the first data rate. The driver is configured to receive a combined current comprising the currents output by the DACs and to generate an output signal that is proportional to the combined current.

Abstract: A variable gain amplifier system includes a variable gain amplifier circuit configured to receive an input signal, apply a gain to the input signal, and generate an output signal in accordance with the gain applied to the input signal. The variable gain amplifier circuit is further configured to receive a gain control signal and a bandwidth control signal. A control module is configured to generate the gain control signal to adjust the gain of the variable gain amplifier circuit and generate, separately from the gain control signal, the bandwidth control signal to adjust a bandwidth of the variable gain amplifier circuit by selectively varying an amount of inductance contributed by an inductor circuit of the variable gain amplifier circuit.

Abstract: The present invention is directed electrical circuits. According to a specific embodiment, the present invention provides a variable gain amplifier that includes a first switch, which includes drain terminal coupled to an inductor. A second switch is configured in parallel to the inductor, and the resistance value of the second switch is adjustable in response to a control signal. There are other embodiments as well.

Abstract: A differential signal offset adjustment circuit may include a first circuit for receiving a first one of a differential input signal and generating a first one of a differential output signal with positive offset based on a differential offset signal. The circuit may further include a second circuit for receiving a second one of a differential input signal and generating a second one of a differential output signal with a negative offset based on the differential offset signal.

Abstract: A circuit and method in an amplifier circuit for filtering a DC offset in differential input signals and inserting a programmable adjustable crosspoint offset in differential output signals. An amplifier circuit includes a differential amplifier circuit configured to amplify differential input signals into differential output signal. The amplifier circuit further includes a feedback circuit coupled between the differential output signals and the differential input signals. The feedback circuit is configured to generate a programmably adjustable crosspoint offset in the differential output signal and a programmably adjustable cutoff frequency of the feedback circuit. An amplifier method includes amplifying differential input signals into differential output signals, generating a programmably adjustable crosspoint offset in the differential output signal, and generating a programmably adjustable cutoff frequency of a feedback circuit between the differential output signals and the differential input signals.

Abstract: A loss of signal (LOS) detector may include a comparator including a first input, a second input and an output indicating a LOS status. The LOS detector further includes circuitry to compare a first signal on the first input generated by differential input signals and a threshold signal common mode with a second signal on the second input generated by differential threshold signals at a first level and an input signal common mode. The circuit further configured to generate a LOS indicator on the output based on the compare.

Abstract: A circuit and method in an amplifier circuit for filtering a DC offset in differential input signals and inserting a programmable adjustable crosspoint offset in differential output signals. An amplifier circuit includes a differential amplifier circuit configured to amplify differential input signals into differential output signal. The amplifier circuit further includes a feedback circuit coupled between the differential output signals and the differential input signals. The feedback circuit is configured to generate a programmably adjustable crosspoint offset in the differential output signal and a programmably adjustable cutoff frequency of the feedback circuit. An amplifier method includes amplifying differential input signals into differential output signals, generating a programmably adjustable crosspoint offset in the differential output signal, and generating a programmably adjustable cutoff frequency of a feedback circuit between the differential output signals and the differential input signals.

Abstract: A differential signal offset adjustment circuit may include a first circuit for receiving a first one of a differential input signal and generating a first one of a differential output signal with positive offset based on a differential offset signal. The circuit may further include a second circuit for receiving a second one of a differential input signal and generating a second one of a differential output signal with a negative offset based on the differential offset signal.

Abstract: A loss of signal (LOS) detector may include a comparator including a first input, a second input and an output indicating a LOS status. The LOS detector further includes circuitry to compare a first signal on the first input generated by differential input signals and a threshold signal common mode with a second signal on the second input generated by differential threshold signals at a first level and an input signal common mode. The circuit further configured to generate a LOS indicator on the output based on the compare.

Abstract: A driver circuit includes a differential driver and a duty cycle correction circuit. The differential driver includes differential inputs to receive a differential input signal and a first common mode input to receive a first input common mode voltage and a first differential output to output a first differential output voltage with a first output common mode voltage. The duty cycle correction circuit includes a first tunable voltage reference and a first comparison circuitry configured to generate the first input common mode voltage based on reducing a difference determined by the first comparison circuitry between a first reference voltage generated by the first tunable voltage reference and the first output common mode voltage at the first differential output of the first differential driver.

Abstract: A differential signal offset adjustment circuit may include a first circuit for receiving a first one of a differential input signal and generating a first one of a differential output signal with positive offset based on a differential offset signal. The circuit may further include a second circuit for receiving a second one of a differential input signal and generating a second one of a differential output signal with a negative offset based on the differential offset signal.

Abstract: A loss of signal (LOS) detector may include a comparator including a first input, a second input and an output indicating a LOS status. The LOS detector further includes circuitry to compare a first signal on the first input generated by differential input signals and a threshold signal common mode with a second signal on the second input generated by differential threshold signals at a first level and an input signal common mode. The circuit further configured to generate a LOS indicator on the output based on the compare.

Abstract: A driver circuit includes a differential driver and a duty cycle correction circuit. The differential driver includes differential inputs to receive a differential input signal and a first common mode input to receive a first input common mode voltage and a first differential output to output a first differential output voltage with a first output common mode voltage. The duty cycle correction circuit includes a first tunable voltage reference and a first comparison circuitry configured to generate the first input common mode voltage based on reducing a difference determined by the first comparison circuitry between a first reference voltage generated by the first tunable voltage reference and the first output common mode voltage at the first differential output of the first differential driver.

Abstract: A differential signal offset adjustment circuit may include a first circuit for receiving a first one of a differential input signal and generating a first one of a differential output signal with positive offset based on a differential offset signal. The circuit may further include a second circuit for receiving a second one of a differential input signal and generating a second one of a differential output signal with a negative offset based on the differential offset signal.

Abstract: A loss of signal (LOS) detector may include a comparator including a first input, a second input and an output indicating a LOS status. The LOS detector further includes circuitry to compare a first signal on the first input generated by differential input signals and a threshold signal common mode with a second signal on the second input generated by differential threshold signals at a first level and an input signal common mode. The circuit further configured to generate a LOS indicator on the output based on the compare.