Patents by Inventor Sagar Shirpimutt

Sagar Shirpimutt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456050
    Abstract: Aspects of a storage device including a memory and a controller are provided which allow sub-blocks with different sub-block addresses to be linked across multiple planes to form metablocks. The memory includes multiple blocks in different planes, where each of the blocks includes multiple sub-blocks. The controller links a first sub-block in a first plane and a second sub-block in a second plane with different sub-block addresses to form the metablock. After forming the metablock, the controller programs different word lines in the first and second sub-blocks when writing data to the metablock. Thus, the controller may write data to linked or relinked metablocks with different sub-block addresses, thereby improving die yield and memory capacity of the storage device.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: September 27, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Chandramani, Sagar Shirpimutt
  • Publication number: 20220270703
    Abstract: Aspects of a storage device including a memory and a controller are provided which allow sub-blocks with different sub-block addresses to be linked across multiple planes to form metablocks. The memory includes multiple blocks in different planes, where each of the blocks includes multiple sub-blocks. The controller links a first sub-block in a first plane and a second sub-block in a second plane with different sub-block addresses to form the metablock. After forming the metablock, the controller programs different word lines in the first and second sub-blocks when writing data to the metablock. Thus, the controller may write data to linked or relinked metablocks with different sub-block addresses, thereby improving die yield and memory capacity of the storage device.
    Type: Application
    Filed: February 24, 2021
    Publication date: August 25, 2022
    Inventors: Chandramani, Sagar Shirpimutt