Patents by Inventor Sagar Uttarwar

Sagar Uttarwar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240036729
    Abstract: Storage devices contain a memory array that comprises memory devices for storing data. These memory devices can be arranged in a configuration of blocks that group a number of memory devices together. Often, blocks are the smallest unit that can be erased, however various storage devices can divide blocks into sub-blocks which can operate as unique blocks themselves. These sub-blocks can be seen as regular blocks to the storage device or host computer. However, the time needed to erase these increased number of operational sub-blocks decreases overall performance as more erase time is needed. Devices and methods described herein decrease overall erase times within a sub-block memory array by checking the status of related sub-blocks before processing an erase request for a particular sub-block. Each of the related sub-blocks can be erased alongside the particular sub-block if the status of the related sub-blocks provides for erasure without losing host data.
    Type: Application
    Filed: August 1, 2022
    Publication date: February 1, 2024
    Inventors: Sagar Uttarwar, Disha Gundecha
  • Publication number: 20230359391
    Abstract: Aspects of a storage device for providing superior sustained sequential write (SSW) performance are disclosed. A controller on the storage device allocates buffer space in the host memory buffers (HMBs) on the host device for storage of relocation data, i.e., data to be folded or compacted. The controller or a hardware element therein can therefore allocate local SRAM (including TRAM) for use in accommodating incoming host writes. The increased SRAM allocation of relocation data without an attendant increase in cost or size to the storage device enables the storage device to perform operations in parallel and substantially increase SSW performance metrics.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Inventors: Sagar UTTARWAR, Disha GUNDECHA
  • Patent number: 10817624
    Abstract: A storage device includes a non-volatile memory including a first block, a second block and a block management area that stores an initial data write time and a final data write time for each of the first block and the second block. The storage device also includes a memory controller that determines a creation time and a modification time for first data in response to a permanently delete command identifying the first data, selects at least one of the first block and the second block to be permanently deleted by comparing the initial data write time and the final data write time for each of the first block and the second block with the creation time and the modification time, and permanently deletes the selected at least one of the first block and the second block.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: October 27, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Hwan Park, Kyung Ho Kim, Min-Chul Kim, Sagar Uttarwar, Yong Gil Song, Min Gon Shin, Sun-Mi Yoo, Hyun Su Jang, Seung Yeun Jeong, Ki Hyun Choi
  • Publication number: 20190130135
    Abstract: A storage device includes a non-volatile memory including a first block, a second block and a block management area that stores an initial data write time and a final data write time for each of the first block and the second block. The storage device also includes a memory controller that determines a creation time and a modification time for first data in response to a permanently delete command identifying the first data, selects at least one of the first block and the second block to be permanently deleted by comparing the initial data write time and the final data write time for each of the first block and the second block with the creation time and the modification time, and permanently deletes the selected at least one of the first block and the second block.
    Type: Application
    Filed: May 9, 2018
    Publication date: May 2, 2019
    Inventors: JIN-HWAN PARK, KYUNG HO KIM, MIN-CHUL KIM, SAGAR UTTARWAR, YONG GIL SONG, MIN GON SHIN, SUN-MI YOO, HYUN SU JANG, SEUNG YEUN JEONG, KI HYUN CHOI
  • Patent number: 9530491
    Abstract: Apparatus and method for writing data directly to multi-level cell (MLC) memory without folding or transferring of the data from single-level cell (SLC) memory to MLC memory are disclosed. A memory device, which includes the SLC memory and MLC memory, receives data from a host device. The memory device programs the data (such as the lower/middle/upper pages) from volatile memory into MLC memory, without transferring data from SLC memory. The memory device also stores part of the data (such as the lower/middle pages) in SLC memory as a backup in case of error. In particular, if the data is not properly programmed into the MLC memory, the data in SLC memory is used to program the data a second time into the MLC memory.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: December 27, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Sagar Uttarwar, Dinesh Agarwal, Prasun Ratn