Abstract: An apparatus includes one or more processor cores, a memory associated with the one or more processing cores, a scheduler, and an activation accelerator. The scheduler is to select a processor core from the one or more processor cores for executing a program thread. The activation accelerator is to send information relating to the program thread to the memory, and to notify the selected processor core to start executing the program thread using the information in the memory.

Abstract: A device includes one or more ports, match-action circuitry, and an action processor. The one or more ports are to exchange packets between the device and a network. The match-action circuitry is to match at least some of the packets to one or more rules so as to set respective actions to be performed, at least one of the actions including a programmable action. The instruction processor is to perform the programmable action by running user-programmable software code. The match-action circuitry is to provide the instruction processor information for performing the programmable action.

Abstract: A network device includes one or more ports, match-action circuitry, and an action processor. The one or more ports are to exchange packets between the network device and a network. The match-action circuitry is to match at least some of the packets to one or more rules so as to set respective actions to be performed, at least one of the actions including a programmable action. The instruction processor is to perform the programmable action by running user-programmable software code. The instruction processor includes architectural registers, one or more of the architectural registers being accessible by the match-action circuitry, and the match-action circuitry is to write into the architectural registers information for performing the programmable action.

Abstract: A network device includes one or more ports, match-action circuitry, and an action processor. The one or more ports are to exchange packets between the network device and a network. The match-action circuitry is to match at least some of the packets to one or more rules so as to set respective actions to be performed, at least one of the actions including a programmable action. The instruction processor is to perform the programmable action by running user-programmable software code. The instruction processor includes architectural registers, one or more of the architectural registers being accessible by the match-action circuitry, and the match-action circuitry is to write into the architectural registers information for performing the programmable action.