Abstract: A method, apparatus and product for accelerating concurrent access to a file in a memory-based file system. The method comprising receiving a request issued by a program, for accessing a file stored in a memory-based file system; and subject to the request being associated with data modification of data within the file, and subject to the modification not necessitating change in a structure of a data structure used for content lookup for the file, acquiring a lock to the file to the program, wherein the lock is acquired in a shared mode.

Abstract: Managing pages in a memory based file system by maintaining a memory into two lists, an Lr list and an Lf list, moving pages from the Lr list to the Lf list based on a repeated access pattern, and moving a page out of the Lr list or the Lf list arbitrarily, thereby enabling the two lists to re-grow according to current workload.

Abstract: Systems and methods are disclosed for enhancing the throughput of a processor by minimizing the number of transfers of data associated with data transfer between a register file and a memory stack. The register file used by a processor running an application is partitioned into a number of blocks. A subset of the blocks of the register file is defined in an application binary interface enabling the subset to be pre-allocated and exposed to the application binary interface. Optionally, blocks other than the subset are not exposed to the application binary interface so that the data relating to application function switch or a context switch is not transferred between the unexposed blocks and a memory stack.

Abstract: A method and system for compute element state replication is provided. The method includes transforming at least a subset of metadata of a source compute element from a memory tier of the source compute element to a block representation; within a destination compute element, mounting the block representation; reverse transforming the metadata to a memory tier of the destination compute element; and using the reverse transformed metadata to operate the destination compute element.

Abstract: Systems and methods are disclosed for sharing one or more registers in an extended processor architecture. The method comprises executing a first thread and a second thread on a processor core supported by an extended register file, wherein one or more registers in the extended register file are accessible by said first and second threads; loading first data for use by the first thread into a first set of physical registers mapped to a first set of logical registers associated with the first thread; and providing the first data for use by the second thread by maintaining the first data in the first set of physical registers and mapping set first set of physical registers to a second set of logical registers associated with the second thread.

Abstract: A method and system for improving performance and latency of instruction execution within an execution pipeline in a processor. The method includes finding, while decoding an instruction, a pointer register used by the instruction; reading the pointer register; validating a pointer register entry; reading, if the pointer register entry is valid, a register file entry; validating a register file entry; validating, if the register file entry is invalid, a valid register file entry wherein the valid register file entry is in the register file's future file; bypassing, if the valid register file entry is valid, a valid register file value from the register file's future file to the execution pipeline wherein the valid register file value is in the valid register file entry; and executing the instruction using the valid register file value; wherein at least one of the steps is carried out using a computer device.

Abstract: Systems and methods are disclosed for enhancing the throughput of a processor by minimizing the number of transfers of data associated with data transfer between a register file and a memory stack. The register file used by a processor running an application is partitioned into a number of blocks. A subset of the blocks of the register file is defined in an application binary interface enabling the subset to be pre-allocated and exposed to the application binary interface. Optionally, blocks other than the subset are not exposed to the application binary interface so that the data relating to application function switch or a context switch is not transferred between the unexposed blocks and a memory stack.