Patents by Inventor Sahan S. Gamage

Sahan S. Gamage has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11665040
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: May 30, 2023
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20220021475
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 20, 2022
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 11075713
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: July 27, 2021
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 10848267
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: November 24, 2020
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20200119834
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: December 13, 2019
    Publication date: April 16, 2020
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 10341046
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: July 2, 2019
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20190173609
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: October 31, 2018
    Publication date: June 6, 2019
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 10305714
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: May 28, 2019
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Patent number: 10158451
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: December 18, 2018
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20180287842
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Application
    Filed: January 29, 2018
    Publication date: October 4, 2018
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Patent number: 9954712
    Abstract: Methods and architectures for blind detection of physical layer control (PLC) signaling for transmitters and receivers having respective misaligned inverse fast Fourier transforms (IFFTs) and (FFTs) includes opening a frequency tracking offset calibration circuit, estimating or calculating a phase discontinuity due to FFT misalignment, closing the frequency tracking offset calibration circuit and applying a frequency correction that includes a frequency offset less the calculated or estimated phase discontinuity.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana, Sahan S. Gamage, Shaul Shulman
  • Patent number: 9954708
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Publication number: 20180048417
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20170272201
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: April 5, 2017
    Publication date: September 21, 2017
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 9634795
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: April 25, 2017
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 9130787
    Abstract: According to various embodiments, devices and methods disclosed herein include performing, using a processor, a linear operation on a first plurality of channel frequency responses and a plurality of corresponding predictor coefficients to estimate a new channel frequency response. Each of the plurality of corresponding predictor coefficients may be updated based on an error value and a second plurality of channel frequency responses to obtain an updated predictor coefficient. The error value may be computed based on an estimated current channel frequency response and a predicted current channel frequency response. The new channel frequency response may be used to equalize a received modulated signal including a single-carrier modulated signal, e.g., a signal modulated using a vestigial sideband modulation scheme, or a quadrature amplitude modulation scheme.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: September 8, 2015
    Assignee: INTEL CORPORATION
    Inventors: Thushara Hewavithana, Bernard Arambepola, Sahan S. Gamage, Parveen K. Shukla
  • Patent number: 9054933
    Abstract: A system according to one embodiment includes a demodulator configured to receive an orthogonal frequency division multiplexed (OFDM) modulated signal comprising a current symbol and a sequence of previous symbols, each of the symbols comprising one or more pilot sub-carriers and one or more data sub-carriers; a phase angle computation circuit coupled to the demodulator, the phase angle computation circuit configured to compute a first mean, the first mean computed from the phase angle of one or more of the pilot sub-carriers of a predetermined number of the previous symbols; a predictive filter circuit coupled to the phase angle computation circuit, the predictive filter circuit configured to compute a second mean, the second mean estimating the phase angle of one or more sub-carriers of the current symbol, the estimation based on the first mean; and a phase noise cancelling circuit coupled to the predictive filter circuit, the phase noise cancelling circuit configured to correct the phase of one or more sub
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: June 9, 2015
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana, Parveen K. Shukla, Sahan S. Gamage
  • Publication number: 20150139351
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Patent number: 8879676
    Abstract: According to various embodiments, apparatus and methods disclosed herein may be implemented in a digital communication (wired or wireless) receiver, and relate to minimizing noise in an estimated channel frequency response at the receiver for the purposes of channel equalization. The disclosed apparatus and methods may include determining a channel impulse response based on an estimated channel frequency response. The estimated channel frequency response, the channel impulse response, or both may include noise. An impulse response mask may be determined based on the channel impulse response, and further applied to the channel impulse response to obtain a noise-reduced channel impulse response, which may be Fourier transformed to obtain a noise-reduced channel frequency response.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: November 4, 2014
    Assignee: Intel Corporation
    Inventors: Thushara Hewavithana, Bernard Arambepola, Parveen K. Shukla, Sahan S. Gamage
  • Patent number: 8842750
    Abstract: According to various embodiments, a method is disclosed that includes receiving an orthogonal frequency-division multiplexing (OFDM) modulated signal at a modulator; filtering the received modulated signal using a plurality of sets of filter coefficients with a linear predictor algorithm; and estimating a channel frequency response based on the filtering.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: September 23, 2014
    Assignee: Intel Corporation
    Inventors: Parveen K. Shukla, Bernard Arambepola, Thushara Hewavithana, Sahan S. Gamage