Patents by Inventor Sahar Sharabi

Sahar Sharabi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240427679
    Abstract: Described herein is a generic hardware/software communication (HSC) channel that facilitates the re-use of pre-silicon DPI methods to enable FPGA-based post-silicon validation. The HSC channel translates a DPI interface into a hardware FIFO based mechanism. This translation allows the reuse of the methods without having to re-implement the entire flow in pure hardware. The core logic for the transactor remains the same, while only a small layer of the transactor is converted into the FIFO based mechanism.
    Type: Application
    Filed: June 27, 2024
    Publication date: December 26, 2024
    Applicant: Intel Corporation
    Inventors: Renu Patle, Hanmanthrao Patli, Rakesh Mehta, Hagay Spector, Ivan Herrera Mejia, Fylur Rahman Sathakathulla, Gowtham Raj Karnam, Mohsin Ali, Sahar Sharabi, Abraham Halevi Fraenkel, Eyal Pniel, Ehud Cohn, Raghav Ramesh Lakshmi, Altug Koker
  • Patent number: 12038819
    Abstract: Described herein is a generic hardware/software communication (HSC) channel that facilitates the re-use of pre-silicon DPI methods to enable FPGA-based post-silicon validation. The HSC channel translates a DPI interface into a hardware FIFO based mechanism. This translation allows the reuse of the methods without having to re-implement the entire flow in pure hardware. The core logic for the transactor remains the same, while only a small layer of the transactor is converted into the FIFO based mechanism.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: July 16, 2024
    Assignee: Intel Corporation
    Inventors: Renu Patle, Hanmanthrao Patli, Rakesh Mehta, Hagay Spector, Ivan Herrera Mejia, Fylur Rahman Sathakathulla, Gowtham Raj Karnam, Mohsin Ali, Sahar Sharabi, Abraham Halevi Fraenkel, Eyal Pniel, Ehud Cohn, Raghav Ramesh Lakshmi, Altug Koker
  • Publication number: 20230401132
    Abstract: Described herein is a generic hardware/software communication (HSC) channel that facilitates the re-use of pre-silicon DPI methods to enable FPGA-based post-silicon validation. The HSC channel translates a DPI interface into a hardware FIFO based mechanism. This translation allows the reuse of the methods without having to re-implement the entire flow in pure hardware. The core logic for the transactor remains the same, while only a small layer of the transactor is converted into the FIFO based mechanism.
    Type: Application
    Filed: June 14, 2022
    Publication date: December 14, 2023
    Applicant: Intel Corporation
    Inventors: Renu Patle, Hanmanthrao Patli, Rakesh Mehta, Hagay Spector, Ivan Herrera Mejia, Fylur Rahman Sathakathulla, Gowtham Raj Karnam, Mohsin Ali, Sahar Sharabi, Abraham Halevi Fraenkel, Eyal Pniel, Ehud Cohn, Raghav Ramesh Lakshmi, Altug Koker