Patents by Inventor Saibun Wong

Saibun Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6469650
    Abstract: A method and system for selecting implementation of a filter controller between a single conversion that ensures a fully-settled converted output and a continuous conversion of an input signal are disclosed. State machine determines whether convert start signal has a duration, which ends on or before a first occurrence of a conversion done on the input signal. Conversion done is an occurrence of when a bit set has been converted from the input signal. If convert start signal has a duration which ends on or before the first occurrence of conversion done, then state machine selects and implements single conversion of the input signal. Digital system ensures a fully-settled converted output by waiting for the filter to receive and filter a predetermined number of bit sets for a conversion output and then outputting the conversion output. Otherwise, state machine selects and implements continuous conversion of the input signal.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: October 22, 2002
    Assignee: Cirrus Logic, Inc.
    Inventors: Kartik Nanda, Aryesh Amar, Saibun Wong, Jerome E. Johnston
  • Publication number: 20020126032
    Abstract: A method and system for selecting implementation of a filter controller between a single conversion that ensures a fully-settled converted output and a continuous conversion of an input signal are disclosed. State machine determines whether convert start signal has a duration, which ends on or before a first occurrence of a conversion done on the input signal. Conversion done is an occurrence of when a bit set has been converted from the input signal. If convert start signal has a duration which ends on or before the first occurrence of conversion done, then state machine selects and implements single conversion of the input signal. Digital system ensures a fully-settled converted output by waiting for the filter to receive and filter a predetermined number of bit sets for a conversion output and then outputting the conversion output. Otherwise, state machine selects and implements continuous conversion of the input signal.
    Type: Application
    Filed: March 6, 2001
    Publication date: September 12, 2002
    Inventors: Kartik Nanda, Aryesh Amar, Saibun Wong, Jerome E. Johnston
  • Patent number: 6377198
    Abstract: The present invention provides a method and apparatus to define and sustain such a physical level by connecting the output through a transmission gate to an input pin. For a certain state of the output, one level of an input may be fed through to the output to generate an output voltage level. In the preferred embodiment of the present invention, a chip select signal {overscore (CS)} is used to define a low level logic signal. An control logic selectively switches a high level logic signal voltage (e.g., V+supply voltage) or the low level logic signal voltage ({overscore (CS)}) to produce an output digital logic signal. In a further embodiment of the present invention, separate logic level signals INH and INL may be selectively switched by control logic to generate an output logic level signal independent of supply voltages V+ and V−.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: April 23, 2002
    Assignee: Cirrus Logic Inc.
    Inventors: Jerome Johnston, Saibun Wong, Qicheng Yu, Douglas F. Pastorello