Patents by Inventor Sai Li
Sai Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210035806Abstract: In a method of manufacturing a semiconductor device, a first layer containing an amorphous first material is formed by a deposition process over a semiconductor layer. A second layer containing a metal second material is formed over the first layer. A thermal process is performed to form an alloy layer of the amorphous first material and the metal second material.Type: ApplicationFiled: October 19, 2020Publication date: February 4, 2021Inventors: Kai-Hsuan LEE, Jyh-Cherng SHEU, Sung-Li WANG, Cheng-Yu YANG, Sheng-Chen WANG, Sai-Hooi YEONG
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Patent number: 10901763Abstract: Embodiments described include systems and methods for user interface (UI) anomaly detection. One or more processors of a client device can execute an application undergoing UI anomaly detection. The application can be injected with a detection engine. The detection engine can determine, while executing as a thread of the application on the one or more processors of the client device, that a dimension of a text-designated region of a first user interface element of the application is less than that of corresponding text for rendering on the user interface element. The detection engine can provide, to a server responsive to the determination, an indication of a first UI anomaly. The indication can include information about a position and size of the first user interface element.Type: GrantFiled: July 19, 2018Date of Patent: January 26, 2021Assignee: Citrix Systems, Inc.Inventors: Maowen Li, Taodong Lu, Sai Xu
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Publication number: 20210006903Abstract: The disclosure discloses a playing control method and apparatus for a device group, and a playing system. The method of the disclosure includes that: a master device and one or more slave devices are determined from multiple playing devices, the multiple playing devices form a device group, a network connection is established between the master device and a server side; an intra-group connection relationship is established between the master device and the one or more slave devices; in response to acquisition of user data, the one or more slave devices transmit the user data to the master device based on the intra-group connection relationship, and the master device interacts with the server side based on the user data.Type: ApplicationFiled: July 2, 2020Publication date: January 7, 2021Inventors: Song LIU, Xiaolei LOU, Sai LI
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Publication number: 20210004407Abstract: Techniques and solutions are described for receiving query results from one or more query services. A system implementing disclosed techniques can receive an identifier for the query used by a query service and an identifier for the query used by the issuing computer system. The query service and the computer system that issued the query can use different schemas for query results. A mapping can be established that maps elements of one schema to the other schema. This mapping, and a mapping of the query identifiers, can be used to convert query results to a format useable by the computing system that issued the query. By converting query results from multiple query services, which may have different formats, to a common format of the issuing computing system, the use of multiple query services is facilitated.Type: ApplicationFiled: July 3, 2019Publication date: January 7, 2021Applicant: SAP SEInventors: Lei Huang, Haibin Yuan, Ting Wang, Guoliang Li, Zhiqian Ding, Wenchang Zhang, Lin Zhao, Lishi Shen, Sai Wu
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Patent number: 10832179Abstract: Embodiments provide a method for constructing a future-state power grid model and device, including that: a current power grid model, an equipment power-off plan, an equipment retirement plan and an equipment addition plan are acquired; then, equipment is added according to the current power grid model, and an added equipment information set, a retired equipment information set and a powered-off equipment information set are determined according to the equipment addition plan, the equipment retirement plan and the equipment power-off plan respectively; and finally, a state of the added equipment is set to be an operating state, an initial network model of each period is formed according to a time sequence, and a future-state network model is constructed according to the added equipment information set, the retired equipment information set, the powered-off equipment information set and the initial network models. The embodiments further provide construction equipment and a storage medium.Type: GrantFiled: September 19, 2017Date of Patent: November 10, 2020Assignees: CHINA ELECTRIC POWER RESEARCH INSTITUTE CO. LTD., STATE GRID CORPORATION OF CHINA, STATE GRID SICHUAN ELECTRIC POWER COMPANYInventors: Guodong Huang, Qiang Ding, Zelei Zhu, Sai Dai, Hui Cui, Dan Xu, Zhi Cai, Bo Li, Chenxu Hu, Chuancheng Zhang, Jinghua Yan, Deyue Men, Jiali Zhang, Peijun Li, Zhen Sun
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Publication number: 20200348534Abstract: Provided are a desktop 3D display system and a display method thereof. The desktop 3D display system comprises a 2D image display module (1), a viewing angle directing module (2), a light modulating module (3) and a rotating module (5), wherein the 2D image display module is used for receiving and displaying an integral imaging source; the viewing angle guide module is arranged on the 2D image display module, and is used for guiding light emitted from the integral imaging source of the 2D image display module; the light modulation module is arranged above the viewing angle guide module for modulating the light guided by the viewing angle guide module and reconstructing a 3D image; and the rotation module is configured to enable synchronous rotation of the 2D image display module, the view angle guide module and the light modulation module, wherein, the rotation angle speed of the synchronous rotation is associated with the switching speed of the integral imaging source of the 2D image display module.Type: ApplicationFiled: February 15, 2019Publication date: November 5, 2020Applicants: BEIHANG UNIVERSITY, SICHUAN UNIVERSITYInventors: Qionghua WANG, Ling LUO, Huan DENG, Hui REN, Min ZHAO, Sai LI
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Patent number: 10811262Abstract: In a method of manufacturing a semiconductor device, a first layer containing an amorphous first material is formed by a deposition process over a semiconductor layer. A second layer containing a metal second material is formed over the first layer. A thermal process is performed to form an alloy layer of the amorphous first material and the metal second material.Type: GrantFiled: January 14, 2016Date of Patent: October 20, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kai-Hsuan Lee, Jyh-Cherng Sheu, Sung-Li Wang, Cheng-Yu Yang, Sheng-Chen Wang, Sai-Hooi Yeong
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Publication number: 20200296071Abstract: Methods and systems for tracking image senders using client devices are described herein. A computing system may receive an image containing a first watermark vector corresponding to a user account of an image sender. The computing system may convert the image to a frequency domain image that contains the first watermark vector. From the frequency domain image, the computing system may identify the first watermark vector. The computing system may compare the first watermark vector to each of a plurality of stored watermark vectors, each corresponding to a known user account, to determine a probability of a match. The computing system may determine the user account of the sender of the image by determining which of the plurality of stored watermark vectors has a highest probability of a match, and may send, to a workplace administrator platform, an indication of the user account.Type: ApplicationFiled: April 1, 2019Publication date: September 17, 2020Inventors: Shuzhen Li, Sai Xu
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Publication number: 20200266271Abstract: Methods for forming semiconductor structures are provided. The method includes alternately stacking first semiconductor layers and second semiconductor layers over a substrate and patterning the first semiconductor layers and the second semiconductor layers to form a first fin structure. The method further includes forming a first trench in the first fin structure and forming a first source/drain structure in the first trench. The method further includes partially removing the first source/drain structure to form a second trench in the first source/drain structure and forming a first contact in the second trench.Type: ApplicationFiled: May 7, 2020Publication date: August 20, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ta-Chun LIN, Kuo-Hua PAN, Jhon-Jhy LIAW, Chao-Ching CHENG, Hung-Li CHIANG, Shih-Syuan HUANG, Tzu-Chiang CHEN, I-Sheng CHEN, Sai-Hooi YEONG
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Publication number: 20200231929Abstract: Disclosed is an Aspergillus niger seed continuous culture method, comprising the steps of: (1) at a startup stage, Aspergillus niger spores are inoculated into a seed culture medium to obtain a seed liquid; (2) at a seed continuous culture stage, continuous dispersion treatment is performed on the seed liquid obtained in step (1), continuous culture is performed on the seed liquid obtained by dispersion, and meanwhile, a fresh seed feed medium is replenished; and (3) at a stop stage, the replenishment of the fresh seed feed medium and the dispersion treatment are stopped, continuous culture is performed to obtain a seed liquid, and then the seed liquid is transferred into the fermentation medium for fermentation culture. The method according to the present invention makes breakthrough to solve problems that multi-cellular filamentous bacteria grow slowly and mycelium pellets are easy to lose in continuous culture, thus fully achieving seed continuous culture.Type: ApplicationFiled: December 24, 2018Publication date: July 23, 2020Applicants: Jiangsu Guoxin Union Energy Co.,Ltd, JIANGNAN UNIVERSITYInventors: Guiyang SHI, Zhijie HU, Youran LI, Xiaodong JIANG, Sai JIN, Fuxin SUN, Cheng ZHANG, Dongjiao ZHOU, Jiawei LU, Maodong MIAO, Zihao FAN
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Patent number: 10692965Abstract: Methods of forming an inductor using dry processes are described. A cavity is laser drilled in an insulator. A first magnetic material layer is printed in the cavity. An Ag conductive ink is printed on the first magnetic material layer and a second magnetic material layer printed on the ink. The ink has a trace sandwiched between the first and second magnetic material layers that provides a majority of the inductance of the inductor. A protective insulating layer protects the second magnetic material layer from a wet chemistry solution when contacts are formed to the ink. The second magnetic material layer and ink are deposited in or on the cavity.Type: GrantFiled: September 26, 2018Date of Patent: June 23, 2020Assignee: Intel CorporationInventors: Chong Zhang, Andrew J. Brown, Sheng Li, Sai Vadlamani, Ying Wang
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Patent number: 10672859Abstract: An apparatus and method of forming a magnetic inductor circuit. A substrate is provided and a first magnetic layer is formed in contact with one layer of the substrate. A conductive trace is formed in contact with the first magnetic layer. A sacrificial cooper layer protects the magnetic material from wet chemistry process steps. A conductive connection is formed from the conductive trace to the outside substrate, the conductive connection comprising a horizontal connection formed by in-layer plating. A second magnetic layer is formed in contact with the conductive trace. Instead of a horizontal connection, a vertical conductive connection can be formed that is perpendicular to the magnetic layers, by drilling a first via in a second of the magnetic layers, forming a buildup layer, and drilling a second via through the buildup layer, where the buildup layer protects the magnetic layers from wet chemistry processes.Type: GrantFiled: June 27, 2018Date of Patent: June 2, 2020Assignee: Intel CorporationInventors: Andrew J. Brown, Rahul Jain, Sheng Li, Sai Vadlamani, Chong Zhang
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Publication number: 20200144364Abstract: A semiconductor device and method of manufacturing the semiconductor device are provided. In some embodiments, the semiconductor device includes a fin extending from a substrate and a gate structure disposed over the fin. The gate structure includes a gate dielectric formed over the fin, a gate electrode formed over the gate dielectric, and a sidewall spacer formed along a sidewall of the gate electrode. In some cases, a U-shaped recess is within the fin and adjacent to the gate structure. A first source/drain layer is conformally formed on a surface of the U-shaped recess, where the first source/drain layer extends at least partially under the adjacent gate structure. A second source/drain layer is formed over the first source/drain layer. At least one of the first and second source/drain layers includes silicon arsenide (SiAs).Type: ApplicationFiled: December 20, 2019Publication date: May 7, 2020Inventors: Chia-Ta YU, Sheng-Chen WANG, Wei-Yuan LU, Chien-I KUO, Li-Li SU, Feng-Cheng YANG, Yen-Ming CHEN, Sai-Hooi YEONG
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Patent number: 10631589Abstract: The invention provides a shell including a left portion and a right portion which are able to switch between a translation open state in which they are separated from each other by a distance and a closed state in which they are closed with each other, wherein in the translation open state, the left portion and the right portion are able to pivot relative to each other, wherein the shell also includes a locking mechanism and a separation bias device, wherein the locking mechanism is configured to keep the shell in the closed state and is able to be released so as to allow the shell to be placed in the translation open state, and wherein the separation bias device is configured to bias the left portion and the right portion toward the translation open state.Type: GrantFiled: May 16, 2017Date of Patent: April 28, 2020Assignee: BEIJING MKS RESEARCH INSTITUTEInventors: Yingui Sun, Hui Elizabeth Zhou, Shiguo Wang, Haipeng Li, Yunpeng Yan, Sai Zhang, Xinyue Zhang
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Patent number: 10618940Abstract: The invention discloses a method for increasing citrate production from genome reconstructed Aspergillus niger. The method is to insert a gene of low affinity glucose transporter, LGT1, to genome of A. niger. The expression level of LGT1 is under control of promoter Pgas. The genome reconstructed A. niger is tolerant to higher fermentation temperature and lower pH than that of the parental strain. Moreover, the production, yield and purity of product from reconstructed A. niger are higher than that of parental strain, and the fermentation time is shorter.Type: GrantFiled: January 11, 2018Date of Patent: April 14, 2020Assignee: Jiangnan UniversityInventors: Long Liu, Jian Chen, Guocheng Du, Jianghua Li, Xian Yin, Zhijie Hu, Jianwei Jiang, Fuxin Sun, Sai Jin, Cheng Zhang, Xiaodong Jiang
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Patent number: 10612007Abstract: The invention discloses a method for improving citric acid production by Aspergillus niger fermentation, which integrates Aspergillus niger GABA pathway succinate semialdehyde dehydrogenase SSD gene into Aspergillus niger genome to obtain recombinant Aspergillus niger strain, and uses recombinant black The Aspergillus strain ferments to produce citric acid; the expression of the succinate semialdehyde dehydrogenase SSD gene is regulated by the Pgas promoter. The method of the invention realizes the expression of succinate semialdehyde dehydrogenase SSD in Aspergillus niger to enhance the GABA pathway so as to strengthen the TCA cycle and promote the synthesis of citric acid.Type: GrantFiled: January 11, 2018Date of Patent: April 7, 2020Assignee: JIANGNAN UNIVERSITYInventors: Long Liu, Jian Chen, Guocheng Du, Jianghua Li, Xian Yin, Zhijie Hu, Jianwei Jiang, Fuxin Sun, Sai Jin, Cheng Zhang, Xiaodong Jiang
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Publication number: 20200098848Abstract: Methods of forming an inductor using dry processes are described. A cavity is laser drilled in an insulator. A first magnetic material layer is printed in the cavity. An Ag conductive ink is printed on the first magnetic material layer and a second magnetic material layer printed on the ink. The ink has a trace sandwiched between the first and second magnetic material layers that provides a majority of the inductance of the inductor. A protective insulating layer protects the second magnetic material layer from a wet chemistry solution when contacts are formed to the ink. The second magnetic material layer and ink are deposited in or on the cavity.Type: ApplicationFiled: September 26, 2018Publication date: March 26, 2020Inventors: Chong Zhang, Andrew J. Brown, Sheng Li, Sai Vadlamani, Ying Wang
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Publication number: 20200026536Abstract: Embodiments described include systems and methods for user interface (UI) anomaly detection. One or more processors of a client device can execute an application undergoing UI anomaly detection. The application can be injected with a detection engine. The detection engine can determine, while executing as a thread of the application on the one or more processors of the client device, that a dimension of a text-designated region of a first user interface element of the application is less than that of corresponding text for rendering on the user interface element. The detection engine can provide, to a server responsive to the determination, an indication of a first UI anomaly. The indication can include information about a position and size of the first user interface element.Type: ApplicationFiled: July 19, 2018Publication date: January 23, 2020Inventors: Maowen Li, Taodong Lu, Sai Xu
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Patent number: 10529803Abstract: A semiconductor device and method of manufacturing the semiconductor device are provided. In some embodiments, the semiconductor device includes a fin extending from a substrate and a gate structure disposed over the fin. The gate structure includes a gate dielectric formed over the fin, a gate electrode formed over the gate dielectric, and a sidewall spacer formed along a sidewall of the gate electrode. In some cases, a U-shaped recess is within the fin and adjacent to the gate structure. A first source/drain layer is conformally formed on a surface of the U-shaped recess, where the first source/drain layer extends at least partially under the adjacent gate structure. A second source/drain layer is formed over the first source/drain layer. At least one of the first and second source/drain layers includes silicon arsenide (SiAs).Type: GrantFiled: November 15, 2017Date of Patent: January 7, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chia-Ta Yu, Sheng-Chen Wang, Wei-Yuan Lu, Chien-I Kuo, Li-Li Su, Feng-Cheng Yang, Yen-Ming Chen, Sai-Hooi Yeong
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Patent number: D898765Type: GrantFiled: January 30, 2019Date of Patent: October 13, 2020Assignee: Citrix Systems, Inc.Inventors: Sai Xu, Rui Zhang, Sujie Li