Patents by Inventor Sai Sriharsha Manapragada

Sai Sriharsha Manapragada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11005461
    Abstract: Various implementations described herein are directed to an integrated circuit having first devices arranged to operate as a latch. The first devices may include inner devices and outer devices. The integrated circuit may include second devices coupled to the first devices and arranged to operate as a level shifter. The second devices may include upper devices and lower devices. The lower devices may be cross-coupled to gates of the inner devices and the upper devices. The integrated circuit may include input signals applied to gates of the outer devices and the lower devices to thereby generate output signals from the outputs of the lower devices that are applied to the gates of the inner devices and the upper devices to activate latching of the output signals.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: May 11, 2021
    Assignee: Arm Limited
    Inventors: Andy Wangkun Chen, Sai Sriharsha Manapragada, Yicong Li, Yew Keong Chong, Bikas Maiti, Sanjay Mangal, Hsin-Yu Chen
  • Publication number: 20190379364
    Abstract: Various implementations described herein are directed to an integrated circuit having first devices arranged to operate as a latch. The first devices may include inner devices and outer devices. The integrated circuit may include second devices coupled to the first devices and arranged to operate as a level shifter. The second devices may include upper devices and lower devices. The lower devices may be cross-coupled to gates of the inner devices and the upper devices. The integrated circuit may include input signals applied to gates of the outer devices and the lower devices to thereby generate output signals from the outputs of the lower devices that are applied to the gates of the inner devices and the upper devices to activate latching of the output signals.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 12, 2019
    Inventors: Andy Wangkun Chen, Sai Sriharsha Manapragada, Yicong Li, Yew Keong Chong, Bikas Maiti, Sanjay Mangal, Hsin-Yu Chen