Patents by Inventor Saied Rafati

Saied Rafati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7902874
    Abstract: The separate high speed and full speed drivers used in a Universal Serial Bus 2.0 application can be combined into one driver which functions both as full speed/high speed driver and as a result provides output impedance for the full speed/high speed modes which is less process dependent.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: March 8, 2011
    Assignee: Exar Corporation
    Inventor: Saied Rafati
  • Publication number: 20040046598
    Abstract: A protection circuit for a transmission gate having a PMOS transmission gate transistor and an NMOS transmission gate transistor coupled between a core circuit and an I/O pad. Biasing transistors are coupled to gates of the NMOS and PMOS transmission gate transistors to turn them on during normal operation. A protection circuit will turn off the NMOS and PMOS transmission gate transistors when the voltage at the pad exceeds the supply voltage by more than a threshold amount. This protection circuit includes a first protection transistor coupled between the gates of the biasing transistors and the pad to turn the biasing transistors off when the voltage on the pad exceeds the supply voltage by more than the threshold amount.
    Type: Application
    Filed: September 10, 2002
    Publication date: March 11, 2004
    Applicant: Exar Corporation
    Inventors: Bahram Fotouhi, Bahman Farzan, Saied Rafati
  • Patent number: 6700431
    Abstract: A protection circuit for a transmission gate having a PMOS transmission gate transistor and an NMOS transmission gate transistor coupled between a core circuit and an I/O pad. Biasing transistors are coupled to gates of the NMOS and PMOS transmission gate transistors to turn them on during normal operation. A protection circuit will turn off the NMOS and PMOS transmission gate transistors when the voltage at the pad exceeds the supply voltage by more than a threshold amount. This protection circuit includes a first protection transistor coupled between the gates of the biasing transistors and the pad to turn the biasing transistors off when the voltage on the pad exceeds the supply voltage by more than the threshold amount.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: March 2, 2004
    Assignee: Exar Corporation
    Inventors: Bahram Fotouhi, Bahman Farzan, Saied Rafati
  • Patent number: 6121837
    Abstract: An operational amplifier that exhibits a relatively constant gain over process and temperature variations. The operational amplifier according to the present invention is designed such that its gain does not depend on process sensitive parameters such as mobility of field effect transistors.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: September 19, 2000
    Assignee: Exar Corporation
    Inventors: Roubik Gregorian, Saied Rafati