Patents by Inventor Sai Feng Liu

Sai Feng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240090231
    Abstract: An integrated circuit is provided. The integrated circuit includes a three-dimensional memory device, a first word line driving circuit and a second word line driving circuit. The three-dimensional memory device includes stacking structures separately extending along a column direction. Each stacking structure includes a stack of word lines. The stacking structures have first staircase structures at a first side and second staircase structures at a second side. The word lines extend to steps of the first and second staircase structures. The first and second word line driving circuits lie below the three-dimensional memory device, and extend along the first and second sides, respectively. Some of the word lines in each stacking structure are routed to the first word line driving circuit from a first staircase structure, and others of the word lines in each stacking structure are routed to the second word line driving circuit from a second staircase structure.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bo-Feng Young, Yi-Ching Liu, Sai-Hooi Yeong, Yih Wang, Yu-Ming Lin
  • Publication number: 20240081077
    Abstract: A transistor includes a first semiconductor layer, a second semiconductor layer, a semiconductor nanosheet, a gate electrode and source and drain electrodes. The semiconductor nanosheet is physically connected to the first semiconductor layer and the second semiconductor layer. The gate electrode wraps around the semiconductor nanosheet. The source and drain electrodes are disposed at opposite sides of the gate electrode. The first semiconductor layer surrounds the source electrode, the second semiconductor layer surrounds the drain electrode, and the semiconductor nanosheet is disposed between the source and drain electrodes.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Applicants: Taiwan Semiconductor Manufacturing Company, Ltd., National Yang Ming Chiao Tung University
    Inventors: Po-Tsun Liu, Meng-Han Lin, Zhen-Hao Li, Tsung-Che Chiang, Bo-Feng Young, Hsin-Yi Huang, Sai-Hooi Yeong, Yu-Ming Lin
  • Patent number: 10691169
    Abstract: A cover for an electronic device and methods of forming a cover is disclosed. The electronic device may include a housing, and a cover coupled to the housing. The cover may have an inner surface having at least one of an intermediate polish and a final polish, a groove formed on the inner surface, and an outer surface positioned opposite the inner surface. The outer surface may have at least one of the intermediate polish and the final polish. The cover may also have a rounded perimeter portion formed between the inner surface and the outer surface. The rounded perimeter portion may be positioned adjacent the groove. The method for forming the cover may include performing a first polishing process on the sapphire component using a polishing tool, and performing a second polishing process on the groove of the sapphire component forming the cover using blasting media.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: June 23, 2020
    Assignee: APPLE INC.
    Inventors: Jeffrey C. Mylvaganam, Erik G. de Jong, Dale N. Memering, Xiao Bing Cai, Palaniappan Chinnakaruppan, Jong Kong Lee, Srikanth Kamireddi, Sawako Kamei, Feng Min, Jing Zhang, Xiang Du, Sai Feng Liu
  • Publication number: 20180284843
    Abstract: A cover for an electronic device and methods of forming a cover is disclosed. The electronic device may include a housing, and a cover coupled to the housing. The cover may have an inner surface having at least one of an intermediate polish and a final polish, a groove formed on the inner surface, and an outer surface positioned opposite the inner surface. The outer surface may have at least one of the intermediate polish and the final polish. The cover may also have a rounded perimeter portion formed between the inner surface and the outer surface. The rounded perimeter portion may be positioned adjacent the groove. The method for forming the cover may include performing a first polishing process on the sapphire component using a polishing tool, and performing a second polishing process on the groove of the sapphire component forming the cover using blasting media.
    Type: Application
    Filed: May 9, 2018
    Publication date: October 4, 2018
    Inventors: Jeffrey C. Mylvaganam, Erik G. de Jong, Dele N. Memering, Xiao Bing Cai, Palaniappan Chinnakaruppan, Jong Kong Lee, Srikanth Kamireddi, Sawako Kamei, Feng Min, Jing Zhang, Xiang Du, Sai Feng Liu
  • Patent number: 9977464
    Abstract: A cover for an electronic device and methods of forming a cover is disclosed. The electronic device may include a housing, and a cover coupled to the housing. The cover may have an inner surface having at least one of an intermediate polish and a final polish, a groove formed on the inner surface, and an outer surface positioned opposite the inner surface. The outer surface may have at least one of the intermediate polish and the final polish. The cover may also have a rounded perimeter portion formed between the inner surface and the outer surface. The rounded perimeter portion may be positioned adjacent the groove. The method for forming the cover may include performing a first polishing process on the sapphire component using a polishing tool, and performing a second polishing process on the groove of the sapphire component forming the cover using blasting media.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: May 22, 2018
    Assignee: APPLE INC.
    Inventors: Jeffrey C. Mylvaganam, Erik G. de Jong, Dale N. Memering, Xiao Bing Cai, Palaniappan Chinnakaruppan, Jong Kong Lee, Srikanth Kamireddi, Sawako Kamei, Feng Min, Jing Zhang, Xiang Du, Sai Feng Liu
  • Publication number: 20160062405
    Abstract: A cover for an electronic device and methods of forming a cover is disclosed. The electronic device may include a housing, and a cover coupled to the housing. The cover may have an inner surface having at least one of an intermediate polish and a final polish, a groove formed on the inner surface, and an outer surface positioned opposite the inner surface. The outer surface may have at least one of the intermediate polish and the final polish. The cover may also have a rounded perimeter portion formed between the inner surface and the outer surface. The rounded perimeter portion may be positioned adjacent the groove. The method for forming the cover may include performing a first polishing process on the sapphire component using a polishing tool, and performing a second polishing process on the groove of the sapphire component forming the cover using blasting media.
    Type: Application
    Filed: August 26, 2015
    Publication date: March 3, 2016
    Inventors: Jeffrey C. Mylvaganam, Erik G. de Jong, Dale N. Memering, Xiao Bing Cai, Palaniappan Chinnakaruppan, Jong Kong Lee, Srikanth Kamireddi, Sawako Kamei, Feng Min, Jing Zhang, Xiang Du, Sai Feng Liu