Abstract: The communication semiconductor integrated circuit includes serial-signal processing circuits having low-pass filters and variable gain amplifier circuits cascade-connected in series. The low-pass filters constituting the serial-signal processing circuit each include a variable capacitance circuit composed of capacitance elements and switching elements connected in series to the capacitance elements, respectively, and capable of selecting the capacitance elements to change capacitance of the low-pass filter. A reference clock signal is supplied to the circuit containing the low-pass filters upon turning on of a power supply, for example, to determine a deviation of a delay time in the circuit to a design value and on and off states of the switching elements of the variable capacitance circuit are set so that the deviation of the delay time is minimized.