Patents by Inventor Sakari Kaneku

Sakari Kaneku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10128305
    Abstract: A semiconductor element is disclosed including a construction with electrode-dividing grooves, in which a dark current is smaller than in existing examples. A method of forming such grooves is also disclosed. In an embodiment, grooves, which electrically divide an electrode layer formed on the surface of a substrate, are formed with a V-shaped cross-sectional shape, groove side walls in the electrode layer, constituting the grooves, being sloping surfaces. An embodiment of the method of forming the grooves includes using a dicing blade having a blade distal end portion which is sharpened into a V-shape to cut a semiconductor wafer in which multiple patterns of semiconductor elements including an electrode layer on the surface of a substrate are formed, forming the grooves having a V-shaped cross-sectional shape which divide the electrode layer in each semiconductor element.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: November 13, 2018
    Assignee: SIEMENS HEALTHCARE GMBH
    Inventors: Sakari Kaneku, Yasuhiro Shuto, Akira Tachibana
  • Publication number: 20160254313
    Abstract: A semiconductor element is disclosed including a construction with electrode-dividing grooves, in which a dark current is smaller than in existing examples. A method of forming such grooves is also disclosed. In an embodiment, grooves, which electrically divide an electrode layer formed on the surface of a substrate, are formed with a V-shaped cross-sectional shape, groove side walls in the electrode layer, constituting the grooves, being sloping surfaces. An embodiment of the method of forming the grooves includes using a dicing blade having a blade distal end portion which is sharpened into a V-shape to cut a semiconductor wafer in which multiple patterns of semiconductor elements including an electrode layer on the surface of a substrate are formed, forming the grooves having a V-shaped cross-sectional shape which divide the electrode layer in each semiconductor element.
    Type: Application
    Filed: May 11, 2016
    Publication date: September 1, 2016
    Applicant: Siemens Aktiengesellschaft
    Inventors: Sakari KANEKU, Yasuhiro SHUTO, Akira TACHIBANA
  • Publication number: 20140361393
    Abstract: A semiconductor element is disclosed including a construction with electrode-dividing grooves, in which a dark current is smaller than in existing examples. A method of forming such grooves is also disclosed. In an embodiment, grooves, which electrically divide an electrode layer formed on the surface of a substrate, are formed with a V-shaped cross-sectional shape, groove side walls in the electrode layer, constituting the grooves, being sloping surfaces. An embodiment of the method of forming the grooves includes using a dicing blade having a blade distal end portion which is sharpened into a V-shape to cut a semiconductor wafer in which multiple patterns of semiconductor elements including an electrode layer on the surface of a substrate are formed, forming the grooves having a V-shaped cross-sectional shape which divide the electrode layer in each semiconductor element.
    Type: Application
    Filed: June 6, 2014
    Publication date: December 11, 2014
    Inventors: Sakari KANEKU, Yasuhiro SHUTO, Akira TACHIBANA
  • Patent number: 6903786
    Abstract: A method of manufacturing an LCD device which includes a gate line having an effective display area which includes an aluminum alloy layer and an aluminum oxide layer. The gate line also includes a gate terminal portion which is made up of the same aluminum alloy layer with a molybdenum alloy layer formed thereon. To form this structure, an insulating substrate of the LCD device, with the laminated structure of the aluminum alloy layer and the molybdenum layer, is immersed in an electrolytic solution. During the immersion, the molybdenum layer is etched off the aluminum alloy in the effective displaying area, while the etching is prevented in the gate terminal area by a protective layer. Following this, the aluminum oxide layer is formed over the aluminum alloy in the effected display area while the device is still immersed in the electrolytic solution.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: June 7, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Tomoaki Takahashi, Sakari Kaneku, Hideaki Yamamoto, Mitsuo Nakatani, Hiroshi Sasaki
  • Publication number: 20040223090
    Abstract: A method of manufacturing an LCD device which includes a gate line having an effective display area which includes an aluminum alloy layer and an aluminum oxide layer. The gate line also includes a gate terminal portion which is made up of the same aluminum alloy layer with a molybdenum alloy layer formed thereon. To form this structure, an insulating substrate of the LCD device, with the laminated structure of the aluminum alloy layer and the molybdenum layer, is immersed in an electrolytic solution. During the immersion, the molybdenum layer is etched off the aluminum alloy in the effective displaying area, while the etching is prevented in the gate terminal area by a protective layer. Following this, the aluminum oxide layer is formed over the aluminum alloy in the effected display area while the device is still immersed in the electrolytic solution.
    Type: Application
    Filed: June 14, 2004
    Publication date: November 11, 2004
    Inventors: Tomoaki Takahashi, Sakari Kaneku, Hideaki Yamamoto, Mitsuo Nakatani, Hiroshi Sasaki
  • Publication number: 20020030779
    Abstract: The present invention provides a liquid crystal display device, each of gate terminals of which has a laminated structure formed of an aluminum alloy thin film and a molybdenum alloy thin film stacked on the aluminum alloy thin film, and forms respective gate lines by converting the molybdenum alloy thin film of the laminated structure into an aluminum oxide thin film in a effective displaying area of the liquid crystal display device. According to the present invention, any displaying errors of the liquid crystal display device caused by deterioration of insulation between wiring patterns formed therein (like the gate lines) during manufacturing processes thereof will be avoided without adding any fabrication steps to the manufacturing processes thereof.
    Type: Application
    Filed: September 14, 2001
    Publication date: March 14, 2002
    Inventors: Tomoaki Takahashi, Sakari Kaneku, Hideaki Yamamoto, Mitsuo Nakatani, Hiroshi Sasaki