Patents by Inventor Sakee Kubo

Sakee Kubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070111423
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Application
    Filed: January 16, 2007
    Publication date: May 17, 2007
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakee Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi